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公开(公告)号:US20230422502A1
公开(公告)日:2023-12-28
申请号:US18202111
申请日:2023-05-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Seulji LEE , Jinhyuk Kim , Byoungil Lee , Sehoon Lee , Jinwoo Jeon
Abstract: A semiconductor device includes: a memory cell structure on a peripheral circuit structure; a through wiring region on the peripheral circuit structure; and a barrier structure surrounding the through wiring region. The memory cell structure includes: gate electrodes and first interlayer insulating layers that are alternately stacked, the gate electrodes forming a step shape on the second region; a channel structure; and isolation regions penetrating through the gate electrodes. The through wiring region includes: second interlayer insulating layers and sacrificial insulating layers alternately stacked on the second region; and a through contact plug penetrating through the second interlayer insulating layers and the sacrificial insulating layers, and electrically connected to the circuit devices. Each of the sacrificial insulating layers includes a recess portion that is horizontally recessed from the barrier structure toward each of the sacrificial insulating layers.
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公开(公告)号:US20240324206A1
公开(公告)日:2024-09-26
申请号:US18581174
申请日:2024-02-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Byungik YOO , Seungbeom KO , Taemok GWON , Changjin SON , Chadong YEO , Seulji LEE , Seungmin LEE
Abstract: A nonvolatile memory device includes a substrate including a memory cell region and a connection region; a mold structure including a plurality of gate electrodes and a plurality of mold insulating layers alternately stacked; a channel structure passing through the mold structure in the memory cell region; a first cell contact passing through the mold structure in the connection region, connected to a first gate electrode and electrically disconnected from a second gate electrode; a plurality of support structures surrounding the first cell contact planarly in the connection region and extending through the mold structure; and a dam structure located between the first cell contact and the second gate electrode in the connection region and apart from the first cell contact with an insulating ring therebetween.
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