公开(公告)号：US20240112606A1

公开(公告)日：2024-04-04

申请号：US18372350

申请日：2023-09-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Deoksoo PARK ,  Seungwan Kim ,  Yongkwon Cho ,  Byoungju Song ,  Sanghoon Lee

IPC: G09G3/00 ,  G06T5/00 ,  G06T5/50

CPC classification number: G09G3/03 ,  G06T5/001 ,  G06T5/50 ,  G09G2320/02 ,  G09G2340/10

Abstract: An image processing device is provided. The image processing device includes: an image quality enhancement circuit configured to generate second image data indicating a plurality of pixel values corresponding to a quadrangular shape by performing image quality enhancement processing on first image data; a map decoder configured to read a map, which includes a plurality of pixel adjustment values for adjusting brightness of a first region of the second image data corresponding to a curved edge of a display panel, from a memory and provide alpha values indicated by the map; a processing circuit configured to generate third image data by adjusting the brightness of the first region by applying the alpha values to the second image data; and a transmission circuit configured to output the third image data to a display driving integrated circuit.

公开(公告)号：US20250132243A1

公开(公告)日：2025-04-24

申请号：US18659703

申请日：2024-05-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungmin Baek ,  Seungwan Kim ,  Joohyung Lee ,  Hyunwook Choi

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31

Abstract: A semiconductor package includes a lower redistribution structure including a lower redistribution layer; an interconnection structure disposed on the lower redistribution structure, having internal side surfaces defining a through-portion, external side surfaces, and corner surfaces defining recess portions between adjacent external side surfaces, and including a fiber layer having first fiber ends adjacent to at least a portion of the corner surfaces, an insulating resin layer in which the fiber layer is embedded, and an interconnection layer disposed on at least one surface of the insulating resin layer and electrically connected to the lower redistribution layer; a semiconductor chip disposed in the through-portion of the interconnection structure and including connection pads electrically connected to the lower redistribution layer; an encapsulant disposed in the through-portion and the recess portions of the interconnection structure; an upper redistribution structure disposed on the encapsulant and including an upper redistribution layer electrically connected to the lower redistribution layer; and connection bumps disposed below the lower redistribution structure and electrically connected to the lower redistribution layer.

公开(公告)号：US11508598B2

公开(公告)日：2022-11-22

申请号：US17007883

申请日：2020-08-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seungwan Kim ,  Hyunsuk Yang

IPC: H01L21/683 ,  H01L21/78 ,  H01L21/56 ,  H01L21/67 ,  H01L21/60

Abstract: A frame jig for manufacturing a semiconductor package includes a frame body of a rectangular shape attached to a package structure of a panel shape, wherein the frame body comprises polyphenylene sulfide.