SEMICONDUCTOR DEVICE
    2.
    发明公开

    公开(公告)号:US20240055427A1

    公开(公告)日:2024-02-15

    申请号:US18143187

    申请日:2023-05-04

    Abstract: A semiconductor device including: a substrate including a PMOS region, an N-well tap forming region, and a boundary region; PMOS field effect transistors on the PMOS region; an N-well tap region doped with N-type impurities in the N-well tap forming region; a first metal pattern connected to at least one impurity region of the PMOS field effect transistors, wherein the first metal pattern extends so that an end of the first metal pattern is positioned on the boundary region; a second metal pattern electrically connected to the N-well tap region, wherein the second metal pattern extends so that an end of the second metal pattern is positioned on the boundary region; a first contact plug on the first metal pattern; a second contact plug on the second metal pattern; and an upper wiring on the first and second contact plugs.

    ELECTRONIC DEVICE SUPPORTING MULTIPLE SUBSCRIBER IDENTITY MODULES AND OPERATING METHOD THEREOF

    公开(公告)号:US20250031027A1

    公开(公告)日:2025-01-23

    申请号:US18778504

    申请日:2024-07-19

    Abstract: An electronic device includes: a near field communication (NFC) circuit; at least one processor operatively connected to the NFC circuit; and memory storing instructions that, when executed by the at least one processor, cause the electronic device to: receive, via the NFC circuit from an external electronic device, an NFC application identifier (ID), identify a subscriber identity module (SIM) profile, from among a plurality of SIM profiles, that corresponds to the NFC application ID, and perform, via the NFC circuit, an NFC communication with the external electronic device based on the identified SIM profile.

    SEMICONDUCTOR DEVICE
    4.
    发明申请

    公开(公告)号:US20220344285A1

    公开(公告)日:2022-10-27

    申请号:US17720435

    申请日:2022-04-14

    Abstract: A semiconductor device includes a semiconductor substrate including a main chip region, a guard ring surrounding the main chip region, a moisture-proof ring surrounding the guard ring, an electrode structure in contact with the semiconductor substrate in the main chip region, and at least one metal pattern structure extending from the electrode structure to the moisture-proof ring. The at least one metal pattern structure is a connection line that grounds the moisture-proof ring.

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