公开(公告)号：US20230053956A1

公开(公告)日：2023-02-23

申请号：US17718450

申请日：2022-04-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myeongjin OH ,  Jaejung PARK ,  Hyosang KIM ,  Sukho SHIN ,  Haneul JUNG

IPC: H04N5/378 ,  H04N5/3745

Abstract: In an example embodiment, a ramp generator includes a ramp circuit that receives a first ramp enable signal from a control circuit during a first ramp period, the first ramp period including a first reset period and a first sensing period, and the ramp circuit being configured to output a first ramp signal to a correlated double sampling circuit; an emphasis circuit that increases a voltage level of the first ramp signal during the first reset period, based on a first enable signal received from the control circuit; and a pre-emphasis circuit that further increases the voltage level of the first ramp signal during a first pre-emphasis period in the first reset period, based on a second enable signal received from the control circuit.

公开(公告)号：US20230156372A1

公开(公告)日：2023-05-18

申请号：US17986966

申请日：2022-11-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myeongjin OH ,  Jaejung PARK ,  Sukho SHIN ,  Haneul JUNG

IPC: H04N5/3745 ,  H03M1/76 ,  H04N5/378

CPC classification number: H04N5/37455 ,  H03M1/76 ,  H04N5/378

Abstract: A digital-to-analog converter includes a first channel configured to output a first ramp voltage through an output node, and a first bias circuit configured to apply a bias voltage to the first channel. The first channel comprises a plurality of current cells connected to the first bias circuit, a plurality of selection circuits and a plurality of switches, and a first resistor connected to the output node. Each of the plurality of selection circuits of the first channel comprises a first selection circuit configured to connect a current of one of the plurality of current cells to the first resistor in accordance with a first digital input signal, and a second selection circuit configured to connect the current of the current cell to one of the plurality of switches corresponding to the current cell in accordance with a second digital input signal complementary to the first digital input signal.