公开(公告)号：US11056197B2

公开(公告)日：2021-07-06

申请号：US16947413

申请日：2020-07-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-sun Min ,  Vivek Venkata Kalluru ,  Tae-hong Kwon ,  Ki-won Kim ,  Sung-whan Seo ,  Bilal Ahmad Janjua

IPC: G11C16/04 ,  G11C16/30 ,  H02M3/07 ,  G11C16/10 ,  G11C16/26

Abstract: A charge pump includes: a charging unit including a first n-type transistor connected between an input terminal configured to receive an input voltage and a first node, a second n-type transistor connected between the input terminal and a second node, a first gate control element configured to control the first n-type transistor based on a first clock signal and a second gate control element configured to control the second n-type transistor based on a second clock signal having a phase opposite to the first clock signal; a first pumping capacitor including one end connected to the first node and an other end configured to receive the first clock signal; a second pumping capacitor including one end connected to the second node and an other end configured to receive the second clock signal; and an output unit.

公开(公告)号：US10902926B2

公开(公告)日：2021-01-26

申请号：US16675914

申请日：2019-11-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-sun Min ,  Vivek Venkata Kalluru ,  Tae-hong Kwon ,  Ki-won Kim ,  Sung-whan Seo ,  Bilal Ahmad Janjua

IPC: G11C16/04 ,  G11C16/30 ,  H02M3/07 ,  G11C16/26 ,  G11C16/10 ,  G11C11/56

Abstract: A charge pump includes: a charging unit including a first n-type transistor connected between an input terminal configured to receive an input voltage and a first node, a second n-type transistor connected between the input terminal and a second node, a first gate control element configured to control the first n-type transistor based on a first clock signal and a second gate control element configured to control the second n-type transistor based on a second clock signal having a phase opposite to the first clock signal; a first pumping capacitor including one end connected to the first node and an other end configured to receive the first clock signal; a second pumping capacitor including one end connected to the second node and an other end configured to receive the second clock signal; and an output unit.