公开(公告)号：US20180203346A1

公开(公告)日：2018-07-19

申请号：US15919653

申请日：2018-03-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hwanchul JEON ,  Munja KIM ,  Sungwon KWON ,  Byunggook KIM ,  Roman CHALYKH ,  Yongseok JUNG ,  Jaehyuck CHOI

IPC: G03F1/64 ,  G03F1/62

CPC classification number: G03F1/64 ,  G03F1/62

Abstract: A pellicle for lithography processes, including extreme ultraviolet (EUV) lithography may mitigate thermal accumulation in a membrane of the pellicle. The pellicle includes a membrane and at least one thermal buffer layer on at least one surface of the membrane. An emissivity of the thermal buffer layer may be greater than an emissivity of the membrane. A carbon content of the thermal buffer layer may be greater than a carbon content of the membrane. Multiple thermal buffer layers may be on separate surfaces of the membrane, and the thermal buffer layers may have different properties. A capping layer may be on at least one thermal buffer layer, and the capping layer may include a hydrogen resistant material. A thermal buffer layer may extend over some or all of a surface of the membrane. A thermal buffer layer may be between at least two membranes.

公开(公告)号：US20160172207A1

公开(公告)日：2016-06-16

申请号：US14955455

申请日：2015-12-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungwon KWON ,  Chalykh ROMAN

IPC: H01L21/308 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/02

CPC classification number: G03F1/62 ,  G03F1/66 ,  G03F7/70983 ,  H01L21/67359

Abstract: A method of manufacturing a pellicle membrane includes forming a silicon layer on a substrate, forming a mask pattern on the silicon layer, and performing a wet etching process on the silicon layer exposed by the mask pattern to form silicon patterns with an uneven structure. A contact area between the silicon patterns and the substrate may be larger than that between the silicon patterns and the mask pattern, and each of the silicon patterns may be formed in such a way that a side surface thereof has an ascending slope in a vertical direction oriented from the substrate toward the mask pattern and is a crystal plane of (111).

Abstract translation: 制造防护薄膜的方法包括在基板上形成硅层，在硅层上形成掩模图案，对由掩模图案露出的硅层进行湿蚀刻处理，形成不均匀结构的硅图案。 硅图案和基板之间的接触面积可以大于硅图案和掩模图案之间的接触面积，并且每个硅图案可以以这样的方式形成，使得其侧表面在垂直方向上具有上升斜率 从衬底朝向掩模图案定向并且是（111）的晶面。