公开(公告)号：US20240266307A1

公开(公告)日：2024-08-08

申请号：US18390205

申请日：2023-12-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junghyun Roh ,  Wangsun Lim ,  Manhee Han ,  Jaeyoung Hong

IPC: H01L23/00 ,  H01L21/56

CPC classification number: H01L24/03 ,  H01L21/56 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/0384 ,  H01L2224/0391 ,  H01L2224/96 ,  H01L2224/97

Abstract: Provided is a method of fabricating a semiconductor package, the method including forming a passivation layer and a first protective layer covering a semiconductor substrate and conductive pad above a first surface of the semiconductor substrate, removing a portion of the passivation layer and a portion of the first protective layer to expose the conductive pad, forming a second protective layer covering the conductive pad on the first protective layer, grinding a second surface opposite the first surface of the semiconductor substrate, dicing the semiconductor substrate, and removing the second protective layer to expose the conductive pad, wherein the second protective layer does not expose the conductive pad during the grinding and during the dicing.