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    SEMICONDUCTOR MEMORY DEVICE
    2.
    发明公开
    SEMICONDUCTOR MEMORY DEVICE 审中-公开

    公开(公告)号：US20230232619A1

    公开(公告)日：2023-07-20

    申请号：US17886731

    申请日：2022-08-12

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hosun JUNG ,  Minwu KIM ,  Jungwoo SONG ,  Wonchul LEE

    IPC: H01L27/108

    CPC classification number: H01L27/10897 ,  H01L27/10814 ,  H01L27/10894

    Abstract: A semiconductor memory device includes a substrate including memory cell, peripheral, and intermediate regions; a device isolation pattern; a partitioning pattern; bit lines extending in a first direction to a boundary between the intermediate and peripheral regions; storage node contacts on the memory cell region and filling a lower portion of a space between bit lines; landing pads on the storage node contacts; dummy storage node contacts on the intermediate region and filling a lower portion of a space between bit lines; dummy landing pads on the dummy storage node contacts; and a dam structure on the intermediate region, extending in the first direction, and having a bar shape, wherein the dummy landing pads are spaced apart from an edge of the dam structure in a second direction, and the dummy storage node contacts are in contact with the partitioning pattern.

    STORAGE SYSTEM WITH BAD BLOCKS, AND OPERATING METHOD THEREOF
    3.
    发明公开
    STORAGE SYSTEM WITH BAD BLOCKS, AND OPERATING METHOD THEREOF 审中-公开

    公开(公告)号：US20240354018A1

    公开(公告)日：2024-10-24

    申请号：US18378452

    申请日：2023-10-10

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jin-Hee MA ,  Kyuho SON ,  Yunho YANG ,  Sangyoon OH ,  Wonchul LEE ,  Jaigyun LIM

    IPC: G06F3/06

    CPC classification number: G06F3/064 ,  G06F3/0607 ,  G06F3/0679 ,  G06F12/0253

    Abstract: The present disclosure provides methods and apparatuses for a storage system. In some embodiments, a storage system includes a plurality of storage devices and a host device. Each storage device of the plurality of storage devices includes a plurality of blocks classified into first type blocks, second type blocks, and third type blocks, and is configured to generate internal state information items indicating information on a first number of first type blocks, a second number of second type blocks, and a third number of third type blocks. The host device is configured to receive, from the plurality of storage devices, the internal state information items, generate target state information such that the plurality of storage devices include a same number or substantially same number of first type blocks, based on the internal state information items, and transmit, to the plurality of storage devices, the target state information.

    ELECTRONIC DEVICE INCLUDING A PLURALITY OF STORAGE DEVICES AND OPERATING METHOD OF ELECTRONIC DEVICE
    4.
    发明公开
    ELECTRONIC DEVICE INCLUDING A PLURALITY OF STORAGE DEVICES AND OPERATING METHOD OF ELECTRONIC DEVICE 审中-公开

    公开(公告)号：US20240319890A1

    公开(公告)日：2024-09-26

    申请号：US18467338

    申请日：2023-09-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jaigyun LIM ,  Jin-Hee MA ,  Kyuho SON ,  Sangyoon OH ,  Wonchul LEE

    IPC: G06F3/06

    CPC classification number: G06F3/0619 ,  G06F3/0659 ,  G06F3/0689

    Abstract: Disclosed is a storage system which includes a random access memory, storage devices, and a processing unit that controls the random access memory and the storage devices. Each of the plurality of storage devices includes a first storage area and a second storage area. The processing unit assigns a zone to the first storage areas of the storage devices. The processing unit assigns RAID stripes to the zone, performs a write of sequential data, which are based on sequential logical addresses, with respect to each of the RAID stripes, and performs a write of a parity corresponding to the write of the sequential data after the write of the sequential data is completed. The processing unit writes an intermediate parity corresponding to the parity in the second storage area of at least one storage device among the storage devices while performing the write of the sequential data.

    SEMICONDUCTOR DEVICES INCLUDING SUPPORT PATTERNS
    5.
    发明申请
    SEMICONDUCTOR DEVICES INCLUDING SUPPORT PATTERNS 审中-公开

    公开(公告)号：US20190296022A1

    公开(公告)日：2019-09-26

    申请号：US16440399

    申请日：2019-06-13

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jae-Hoon SONG ,  Kiheum NAM ,  Wonchul LEE

    IPC: H01L27/108 ,  H01L21/768 ,  H01L23/528 ,  H01L29/41 ,  H01L49/02

    Abstract: A semiconductor device includes a plurality of pillar structures on a semiconductor substrate, and a support pattern in contact with at least a part of each of the pillar structures, the support pattern connecting the pillar structures with one another, wherein the support pattern includes support holes exposing side surfaces of the pillar structures, the support holes including at least a first support hole and a second support hole that are spaced apart from each other, the first and second support holes having different shapes from each other.

    ELECTRONIC DEVICE FOR TIMEOUT PREVENTION AND OPERATION METHOD THEREOF
    7.
    发明公开
    ELECTRONIC DEVICE FOR TIMEOUT PREVENTION AND OPERATION METHOD THEREOF 审中-公开

    公开(公告)号：US20240211388A1

    公开(公告)日：2024-06-27

    申请号：US18340413

    申请日：2023-06-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jin-Hee MA ,  Kyuho SON ,  Sangyoon OH ,  Wonchul LEE ,  Jaigyun LIM

    IPC: G06F12/02

    CPC classification number: G06F12/023

    Abstract: Disclosed is an electronic device including a processor configured to receive a command requesting an operation for a plurality of group zones from a host, transmit a completion response to the command to the host, and perform a background operation for the command; and a plurality of storage devices, the processor configured to control the plurality of storage devices, each of the plurality of group zones including a plurality of zones included in one or more storage devices among the plurality of storage devices, and the processor being configured to perform the background operation including generating a plurality of distribution commands for each of the plurality of storage devices from the command, and issuing one or more distribution commands among the plurality of distribution commands to one or more storage devices corresponding to the one or more distribution commands, respectively.

    SEMICONDUCTOR DEVICES
    8.
    发明公开
    SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20240172417A1

    公开(公告)日：2024-05-23

    申请号：US18420138

    申请日：2024-01-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sohyeon BAE ,  Wonchul LEE ,  Jaehyun KIM ,  Jaehyuk JANG ,  Hyebin CHOI

    IPC: H10B12/00 ,  H01L23/528

    CPC classification number: H10B12/315 ,  H01L23/528

    Abstract: A semiconductor device includes a gate structure and a contact plug. The gate structure extends in a first direction parallel to the substrate, and includes a first conductive pattern, a second conductive pattern and a gate mask sequentially stacked. The contact plug contacts an end portion in the first direction of the gate structure, and includes a first extension portion extending in a vertical direction and contacting sidewalls of the gate mask and the second conductive pattern, a second extension portion under and contacting the first extension portion and a sidewall of the first conductive pattern, and a protrusion portion under and contacting the second extension portion. A bottom of the protrusion portion does not contact the first conductive pattern. A first slope of a sidewall of the first extension portion is greater than a second slope of a sidewall of the second extension portion.

    SEMICONDUCTOR DEVICES
    9.
    发明申请
    SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20220271041A1

    公开(公告)日：2022-08-25

    申请号：US17484679

    申请日：2021-09-24

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sohyeon BAE ,  Wonchul LEE ,  Jaehyun KIM ,  Jaehyuk JANG ,  Hyebin CHOI

    IPC: H01L27/108 ,  H01L23/528

    Abstract: A semiconductor device includes a gate structure and a contact plug. The gate structure extends in a first direction parallel to the substrate, and includes a first conductive pattern, a second conductive pattern and a gate mask sequentially stacked. The contact plug contacts an end portion in the first direction of the gate structure, and includes a first extension portion extending in a vertical direction and contacting sidewalls of the gate mask and the second conductive pattern, a second extension portion under and contacting the first extension portion and a sidewall of the first conductive pattern, and a protrusion portion under and contacting the second extension portion. A bottom of the protrusion portion does not contact the first conductive pattern. A first slope of a sidewall of the first extension portion is greater than a second slope of a sidewall of the second extension portion.

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