公开(公告)号：US20220309216A1

公开(公告)日：2022-09-29

申请号：US17491739

申请日：2021-10-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwoon LEE ,  Joohyun JEON ,  Sungjin KIM ,  Seunghyun KIM ,  Wonki ROH ,  Chulwoo PARK ,  Seongjae BYEON ,  Taeyoon AN ,  Hyoeun JUNG

IPC: G06F30/3308 ,  G06F30/25

Abstract: A method of modeling damages to a crystal caused by an incident particle includes obtaining particle information and crystal information; estimating energy loss of the incident particle based on the particle information and the crystal information; estimating a volume of a vacancy based on the energy loss; estimating a vacancy reaction based on the crystal information and the volume of the vacancy; and generating output data based on the vacancy reaction, the output data including quantification data of the damages.

公开(公告)号：US20230180456A1

公开(公告)日：2023-06-08

申请号：US18059492

申请日：2022-11-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Euichul JEONG ,  Kiseok LEE ,  Wonki ROH ,  Hyungeun CHOI

IPC: H10B12/00

CPC classification number: H01L27/10805 ,  H01L27/1085 ,  H01L27/10873 ,  H01L27/10885

Abstract: A semiconductor memory device including a transistor body extending in a first horizontal direction and including a first source/drain region, a single-crystal channel layer, and a second source/drain region sequentially arranged in the first horizontal direction, a gate electrode layer extending in a second horizontal direction orthogonal to the first horizontal direction and covering upper and lower surfaces of the single-crystal channel layer, a bit line connected to the first source/drain region, extending in a vertical direction, and having a first width in the second horizontal direction, a spacer covering upper and lower surfaces of the first source/drain region and having a second width greater than the first width, and a cell capacitor on a side opposite to the bit line with respect to the transistor body in the first horizontal direction and including lower and upper electrode layers and a capacitor dielectric layer therebetween may be provided.