公开(公告)号：US20170053696A1

公开(公告)日：2017-02-23

申请号：US15221875

申请日：2016-07-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Han-Wool JEONG ,  Woo-Jin RIM ,  Tae-Joong SONG ,  Seong-Ook JUNG ,  Gyu-Hong KIM

IPC: G11C11/419

CPC classification number: G11C11/419 ,  G11C7/18 ,  G11C2207/002

Abstract: Provided is a semiconductor memory device. The semiconductor memory device includes: a memory cell; a sensing circuit connected to the memory cell via a first bit line and a second bit line different from the first bit line, the sensing circuit configured to sense data stored in the memory cell; and a bit line voltage control circuit connected to the memory cell via the first bit line and the second bit line, the bit line voltage control circuit configured to precharge the first bit line to a first voltage that is lower than a supply voltage and to precharge the second bit line to a second voltage that is lower than the supply voltage and is different from the first voltage.

Abstract translation: 提供了一种半导体存储器件。 半导体存储器件包括：存储单元; 感测电路经由第一位线和与第一位线不同的第二位线连接到存储单元，感测电路被配置为感测存储在存储单元中的数据; 以及位线电压控制电路，经由第一位线和第二位线连接到存储单元，位线电压控制电路被配置为将第一位线预充电到低于电源电压的第一电压，并预充电 所述第二位线到低于所述电源电压并且与所述第一电压不同的第二电压。

公开(公告)号：US20150206556A1

公开(公告)日：2015-07-23

申请号：US14504596

申请日：2014-10-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae-Joong SONG ,  Sung-Hyun PARK ,  Woo-Jin RIM ,  Gi-Young YANG

IPC: G11C7/06 ,  G11C7/22 ,  G11C7/12

CPC classification number: G11C7/065 ,  G11C7/12 ,  G11C11/419

Abstract: In a sense amplifier, a switching transistor is configured to apply a ground voltage to a ground node in response to a sense enable signal. A first detection circuit is configured to output a first detection signal to the first detection node based on a mode signal and a voltage of a bit-line. A second detection circuit is configured to output a second detection signal to the second detection node based on a voltage of a complementary bit-line. A latch circuit is connected to a supply voltage, the first detection node and the second detection node, and configured to output a first amplified signal and a second amplified signal through a latch node and a complementary latch node, respectively, based on the first detection signal and the second detection signal.

Abstract translation: 在感测放大器中，开关晶体管被配置为响应于感测使能信号而将接地电压施加到接地节点。 第一检测电路被配置为基于位线的模式信号和电压将第一检测信号输出到第一检测节点。 第二检测电路被配置为基于互补位线的电压将第二检测信号输出到第二检测节点。 锁存电路连接到电源电压，第一检测节点和第二检测节点，并且被配置为分别基于第一检测来通过锁存节点和互补锁存器节点输出第一放大信号和第二放大信号 信号和第二检测信号。