公开(公告)号：US20220328522A1

公开(公告)日：2022-10-13

申请号：US17854356

申请日：2022-06-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joowon Park ,  Woongseop Lee ,  Eiwhan Jung ,  Jisung Cheon

IPC: H01L27/11582 ,  H01L27/11526 ,  H01L27/11556 ,  H01L23/528 ,  H01L27/11573 ,  H01L27/11519 ,  H01L27/11548 ,  H01L27/11565 ,  H01L27/11575 ,  H01L23/522

Abstract: A semiconductor device includes a peripheral circuit region on a first substrate and including circuit devices, a memory cell region on a second substrate overlaid on the first substrate, with the memory cell region including gate electrodes stacked to be spaced apart from each other in a first direction perpendicular to an upper surface of the second substrate, and channel structures which extend vertically on the second substrate and penetrate through the gate electrodes. The channel structures may include a channel layer. The semiconductor device includes a through-wiring region with through-contact plugs that extend in the first direction and that electrically connect the memory cell region and the peripheral circuit region to each other, with the through-wiring region including an insulating region that surrounds the through-contact plugs. The through-wiring region further includes dummy channel structures regularly arranged throughout the through-wiring region and which include the channel layer.

公开(公告)号：US20210057444A1

公开(公告)日：2021-02-25

申请号：US16836010

申请日：2020-03-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： JOOWON PARK ,  Woongseop Lee ,  Eiwhan Jung ,  Jisung Cheon

IPC: H01L27/11582 ,  H01L27/11526 ,  H01L27/11556 ,  H01L23/528 ,  H01L23/522 ,  H01L27/11519 ,  H01L27/11548 ,  H01L27/11565 ,  H01L27/11575 ,  H01L27/11573

Abstract: A semiconductor device includes a peripheral circuit region on a first substrate and including circuit devices, a memory cell region on a second substrate overlaid on the first substrate, with the memory cell region including gate electrodes stacked to be spaced apart from each other in a first direction perpendicular to an upper surface of the second substrate, and channel structures which extend vertically on the second substrate and penetrate through the gate electrodes. The channel structures may include a channel layer. The semiconductor device includes a through-wiring region with through-contact plugs that extend in the first direction and that electrically connect the memory cell region and the peripheral circuit region to each other, with the through-wiring region including an insulating region that surrounds the through-contact plugs. The through-wiring region further includes dummy channel structures regularly arranged throughout the through-wiring region and which include the channel layer.