SEMICONDUCTOR MEMORY DEVICES
    1.
    发明申请

    公开(公告)号:US20190148403A1

    公开(公告)日:2019-05-16

    申请号:US16231710

    申请日:2018-12-24

    Abstract: A semiconductor memory device includes a stack structure including gate electrodes vertically stacked on a substrate and a vertical channel part penetrating the gate electrodes, a bit line connected to the vertical channel part, and a plurality of conductive lines connected to the gate electrodes on the stack structure. The conductive lines form a plurality of stacked layers and include first conductive lines and second conductive lines. The number of the first conductive lines disposed at a first level from the substrate is different from the number of the second conductive lines disposed at a second level from the substrate. The first level is different from the second level.

    SEMICONDUCTOR DEVICES
    2.
    发明申请

    公开(公告)号:US20210057444A1

    公开(公告)日:2021-02-25

    申请号:US16836010

    申请日:2020-03-31

    Abstract: A semiconductor device includes a peripheral circuit region on a first substrate and including circuit devices, a memory cell region on a second substrate overlaid on the first substrate, with the memory cell region including gate electrodes stacked to be spaced apart from each other in a first direction perpendicular to an upper surface of the second substrate, and channel structures which extend vertically on the second substrate and penetrate through the gate electrodes. The channel structures may include a channel layer. The semiconductor device includes a through-wiring region with through-contact plugs that extend in the first direction and that electrically connect the memory cell region and the peripheral circuit region to each other, with the through-wiring region including an insulating region that surrounds the through-contact plugs. The through-wiring region further includes dummy channel structures regularly arranged throughout the through-wiring region and which include the channel layer.

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