公开(公告)号：US20210313995A1

公开(公告)日：2021-10-07

申请号：US17354545

申请日：2021-06-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongrong ZUO ,  Chih-Wei Yao ,  Wanghua Wu

IPC: H03L7/099 ,  H03K17/687 ,  H04L7/033 ,  H01L29/78

Abstract: An apparatus and method are provided. The apparatus includes a phase locked loop (PLL) configured to generate a reference signal; a sub-sampling PLL (SS-PLL) connected to the PLL and configured to sub-sample the reference signal; and a first pre-charge circuit connected to a sampling device of the SS-PLL and configured to facilitate frequency locking of the SS-PLL.

公开(公告)号：US20200343898A1

公开(公告)日：2020-10-29

申请号：US16516581

申请日：2019-07-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongrong ZUO ,  Chih-Wei Yao ,  Wanghua Wu

IPC: H03L7/099 ,  H03K17/687 ,  H01L29/78 ,  H04L7/033

Abstract: An apparatus and method are provided. The apparatus includes a phase locked loop (PLL) configured to generate a reference signal; a sub-sampling PLL (SS-PLL) connected to the PLL and configured to sub-sample the reference signal; and a first pre-charge circuit connected to the SS-PLL and configured to allow an output voltage of the SS-PLL to transition to an operating voltage to indicate that a difference between two voltage inputs is zero on average.