公开(公告)号：US20190371808A1

公开(公告)日：2019-12-05

申请号：US16266409

申请日：2019-02-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kangyoon Choi ,  Gilsung Lee ,  Dong-Sik Lee ,  Yongsik Yim ,  Eunsuk Cho

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/1157 ,  H01L21/28

Abstract: Provided is a three-dimensional semiconductor memory device include a first stack structure and a second stack structure adjacent to each other on a substrate, a first common source plug between the first stack structure and the second stack structure, a second common source plug between the first stack structure and the second stack structure, and a vertical dielectric structure between the first common source plug and the second common source plug. Each of the first stack structure and the second stack structure may include a plurality of insulation layers and a plurality of electrodes alternately stacked on the substrate. The first common source plug may be connected to the substrate. The second common source plug may be spaced apart from the substrate.

公开(公告)号：US10672792B2

公开(公告)日：2020-06-02

申请号：US16266409

申请日：2019-02-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kangyoon Choi ,  Gilsung Lee ,  Dong-Sik Lee ,  Yongsik Yim ,  Eunsuk Cho

IPC: H01L29/792 ,  H01L27/11582 ,  H01L27/1157 ,  H01L27/11565 ,  H01L21/28

Abstract: Provided is a three-dimensional semiconductor memory device include a first stack structure and a second stack structure adjacent to each other on a substrate, a first common source plug between the first stack structure and the second stack structure, a second common source plug between the first stack structure and the second stack structure, and a vertical dielectric structure between the first common source plug and the second common source plug. Each of the first stack structure and the second stack structure may include a plurality of insulation layers and a plurality of electrodes alternately stacked on the substrate. The first common source plug may be connected to the substrate. The second common source plug may be spaced apart from the substrate.