公开(公告)号：US20240422975A1

公开(公告)日：2024-12-19

申请号：US18590354

申请日：2024-02-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwangyoung Jung ,  Sunil Shim ,  Seung-Jun Lee ,  Joohyun Lim ,  Yoojin Jeon

IPC: H10B43/27 ,  H10B43/40

Abstract: A three-dimensional semiconductor memory device may include a peripheral circuit structure on a peripheral substrate, a cell array structure on the peripheral circuit structure, the cell array structure including a cell array region and an outer region, a source structure on the cell array region, a base pattern on the outer region, a cell vertical structure that extends into the cell array structure in the cell array region and is electrically connected to the source structure, an outer vertical structure that extends into the cell array structure in the outer region, and a filling pattern that extends from the outer vertical structure and into the base pattern. The filling pattern defines a void, a top end of the cell vertical structure extends from the peripheral substrate by a first distance, and a top surface of the source structure extends from the peripheral substrate by a second distance.