公开(公告)号：US20240072782A1

公开(公告)日：2024-02-29

申请号：US18176371

申请日：2023-02-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangheon LEE ,  Heewook SHIN ,  Heejune LEE ,  Jungho LEE ,  Youngjae CHO ,  Michael CHOI

IPC: H03K5/135 ,  G01R19/25

CPC classification number: H03K5/135 ,  G01R19/2513 ,  H03K2005/00052

Abstract: A digital droop detector for detecting whether a droop occurs in a power supply voltage, may include processing circuitry configured to, detect a voltage level change of a power supply voltage in response to a clock signal, the detecting the voltage level change including converting the detected voltage level change into a first code, correct at least one nonlinearity included in the first code, the correcting including converting the first code into a second code and a target range, and adjust a delay magnitude of the clock signal based on the second code.

公开(公告)号：US20220190840A1

公开(公告)日：2022-06-16

申请号：US17406193

申请日：2021-08-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyoungjun MOON ,  Dongryeol OH ,  Younghyo PARK ,  Youngjae CHO ,  Michael CHOI

IPC: H03M1/46 ,  H03M1/12 ,  H03M1/06

Abstract: An analog-to-digital converter (ADC) includes a coarse ADC that receives an analog input voltage, generates a first digital signal based on the analog input voltage using a successive approximation register (SAR) method, and outputs a residual voltage remaining after the first digital signal is generated. The ADC further includes an amplifier that receives the residual voltage and a test voltage, generates a residual current by amplifying the residual voltage by a predetermined gain, and generates a test current by amplifying the test voltage by the gain. The ADC further includes a fine ADC that receives the residual current and generates a second digital signal based on the residual current using the SAR method, and an auxiliary path that receives the test current and generates a gain correction signal based on the test current. The gain of the amplifier is adjusted based on the gain correction signal.

公开(公告)号：US20240146292A1

公开(公告)日：2024-05-02

申请号：US18386122

申请日：2023-11-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangheon LEE ,  Jungho LEE ,  Youngjae CHO ,  Michael CHOI

IPC: H03K17/06 ,  H03K3/356 ,  H03K19/0185

CPC classification number: H03K17/063 ,  H03K3/356113 ,  H03K19/018528

Abstract: A bootstrap circuit for generating an output signal through a pre-charge operation and a sample operation, includes: a sampler including a sampling switch configured to sample an input signal, a first protection switch connected between an input node and the sampling switch, and a second protection switch connected between the sampling switch and an output node; and a driver configured to drive the sampler based on a power supply voltage and the input signal.

公开(公告)号：US20220166429A1

公开(公告)日：2022-05-26

申请号：US17387221

申请日：2021-07-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangheon LEE ,  Woongtaek LIM ,  Jungho LEE ,  Youngjae CHO ,  Michael CHOI

IPC: H03K17/693 ,  H03M1/12 ,  H02M3/07

Abstract: A multiplexer includes a charging circuit; a plurality of sampling switches receiving a plurality of input signals; and a plurality of boosting circuits connected between the sampling switches and the charging circuit and sharing the charging circuit. First and second charging switches of the charging circuit are controlled by a first clock signal. Each of the boosting circuits includes a first boosting switch connected to a first node of the charging circuit and a gate of one of the sampling switches, a second boosting switch connected between a second node of the charging circuit and the one sampling switch, and a level shifter configured to control the first boosting switch and the second boosting switch in response to a second clock signal and a selection signal.