公开(公告)号：US12295142B2

公开(公告)日：2025-05-06

申请号：US17728317

申请日：2022-04-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngjin Jung ,  Sora Kim ,  Haeli Park ,  Kwuiyeon Yu ,  Janggn Yun

IPC: H10B43/27 ,  G11C16/04 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B41/40 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40

Abstract: An integrated circuit device according to the inventive concept includes: a semiconductor substrate including a cell region and a connection region; a gate stack including a plurality of gate electrodes and a plurality of insulating layers extending on a main surface of the semiconductor substrate in a horizontal direction and alternately stacked thereon in a vertical direction, the gate stack having a stair structure in the connection region; and a plurality of contact plugs in the connection region, wherein, in a portion of the connection region, a first length, in the horizontal direction, of a first gate electrode that is located in the lowest layer among the plurality of gate electrodes is less than a second length, in the horizontal direction, of a second gate electrode that is located above the first gate electrode.

公开(公告)号：US20230005953A1

公开(公告)日：2023-01-05

申请号：US17728317

申请日：2022-04-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngjin Jung ,  Sora Kim ,  Haeli Park ,  Kwuiyeon Yu ,  Janggn Yun

IPC: H01L27/11582 ,  G11C16/04 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573

Abstract: An integrated circuit device according to the inventive concept includes: a semiconductor substrate including a cell region and a connection region; a gate stack including a plurality of gate electrodes and a plurality of insulating layers extending on a main surface of the semiconductor substrate in a horizontal direction and alternately stacked thereon in a vertical direction, the gate stack having a stair structure in the connection region; and a plurality of contact plugs in the connection region, wherein, in a portion of the connection region, a first length, in the horizontal direction, of a first gate electrode that is located in the lowest layer among the plurality of gate electrodes is less than a second length, in the horizontal direction, of a second gate electrode that is located above the first gate electrode.

公开(公告)号：US20250087585A1

公开(公告)日：2025-03-13

申请号：US18731176

申请日：2024-05-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngjin Jung ,  Jaehwang Sim

IPC: H01L23/528 ,  H01L25/065 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40 ,  H10B80/00

Abstract: A semiconductor device includes a first word line having a first electrode portion and a first extension portion extending from the first electrode portion, a second word line having a second electrode portion disposed at a higher level than the first electrode portion and a second extension portion extending from the second electrode portion, a first vertical memory structure penetrating through the first and second electrode portions in a vertical direction, and a first interconnection structure electrically connected to the first extension portion. The first extension portion includes a first lower portion extending from the first electrode portion and a first plug portion extending upwardly from at least one side of the first lower portion and connected to the first interconnection structure. At least a portion of the first lower portion has a thickness greater than a thickness of the first electrode portion.