SEMICONDUCTOR SYSTEM, NONVOLATILE MEMORY APPARATUS, AND AN ASSOCIATED READ METHOD
    1.
    发明申请
    SEMICONDUCTOR SYSTEM, NONVOLATILE MEMORY APPARATUS, AND AN ASSOCIATED READ METHOD 审中-公开
    半导体系统,非易失性存储器装置和相关的读取方法

    公开(公告)号:US20120320676A1

    公开(公告)日:2012-12-20

    申请号:US13337461

    申请日:2011-12-27

    IPC分类号: G11C16/06 G11C16/04

    摘要: A semiconductor system includes a host configured to output a command, a control signal, an address signal, and data; and a nonvolatile memory apparatus configured to receive at least one of the command, the control signal, the address signal, and the data from the host, to provide a process result to the host, and to determine data levels of memory cells included in an overlap section of memory cell threshold voltage distributions based on an initial read bias voltage.

    摘要翻译: 半导体系统包括被配置为输出命令的主机,控制信号,地址信号和数据; 以及非易失性存储装置,被配置为从主机接收命令,控制信号,地址信号和数据中的至少一个,向主机提供处理结果,并且确定包括在主机中的存储器单元的数据级别 基于初始读偏置电压的存储单元阈值电压分布的重叠部分。

    SEMICONDUCTOR MEMORY SYSTEM HAVING ECC CIRCUIT AND CONTROLLING METHOD THEREOF
    2.
    发明申请
    SEMICONDUCTOR MEMORY SYSTEM HAVING ECC CIRCUIT AND CONTROLLING METHOD THEREOF 有权
    具有ECC电路的半导体存储器系统及其控制方法

    公开(公告)号:US20110029841A1

    公开(公告)日:2011-02-03

    申请号:US12647333

    申请日:2009-12-24

    申请人: Jun Rye RHO

    发明人: Jun Rye RHO

    IPC分类号: H03M13/05 G06F11/10 H03M13/07

    摘要: A semiconductor memory system includes a memory area and an error-correcting (ECC) circuit. The memory area includes a plurality of cells, and the ECC circuit is configured to determine whether uncorrectable error data exists or not by using a parity according to cell data of the memory area in a read mode and a parity according to an encoding result of corrected data of the cell data.

    摘要翻译: 半导体存储器系统包括存储区和纠错(ECC)电路。 存储区域包括多个单元,并且ECC电路被配置为根据读取模式中的存储区域的单元数据和奇偶校验根据校正的编码结果,通过使用奇偶校验来确定是否存在不可校正的错误数据 单元数据的数据。