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公开(公告)号：US08515093B2
公开(公告)日：2013-08-20
申请号：US12900322
申请日：2010-10-07
申请人： Sanjay M. Bhandari , Paul D. Smith , Jiang (Jennifer) Yu , Sheng-Yu Peng , Priscilla E. Escobar-Bowser
发明人： Sanjay M. Bhandari , Paul D. Smith , Jiang (Jennifer) Yu , Sheng-Yu Peng , Priscilla E. Escobar-Bowser
CPC分类号： H04R29/006 , H04R3/005 , H04R25/407
摘要： A system includes a plurality of inputs each configured to receive a filtered version of a source signal. The system extracts the energy information from each input signal and compares the energy information of a plurality of input signals. Alternatively, the system extracts energy information from a signal that is the difference of two input signals. Based on the energy information, the system determines at least one parameter that may be changed in at least one circuit in a plurality of circuits to minimize the differences in energy of the input signals or to minimize the energy of the difference signal. Parameters may include for example amplification, delay, and corner frequency values.The set of circuits may include microphone interface circuits. Merely by way of example, a system with microphone interface circuits may be included in a hearing enhancement device or in a hands-free earpiece.
摘要翻译： 系统包括多个输入，每个输入被配置为接收源信号的滤波版本。 该系统从每个输入信号中提取能量信息，并比较多个输入信号的能量信息。 或者，系统从作为两个输入信号的差的信号提取能量信息。 基于能量信息，系统确定可以在多个电路中的至少一个电路中改变的至少一个参数，以最小化输入信号的能量差异或最小化差分信号的能量。 参数可以包括例如放大，延迟和转角频率值。 该组电路可以包括麦克风接口电路。 仅举例来说，具有麦克风接口电路的系统可以包括在听力增强装置中或免提耳机中。
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公开(公告)号：US20110085686A1
公开(公告)日：2011-04-14
申请号：US12900322
申请日：2010-10-07
申请人： Sanjay M. Bhandari , Paul D. Smith , Jiang (Jennifer) Yu , Sheng-Yu Peng , Priscilla E. Escobar-Bowser
发明人： Sanjay M. Bhandari , Paul D. Smith , Jiang (Jennifer) Yu , Sheng-Yu Peng , Priscilla E. Escobar-Bowser
CPC分类号： H04R29/006 , H04R3/005 , H04R25/407
摘要： A system includes a plurality of inputs each configured to receive a filtered version of a source signal. The system extracts the energy information from each input signal and compares the energy information of a plurality of input signals. Alternatively, the system extracts energy information from a signal that is the difference of two input signals. Based on the energy information, the system determines at least one parameter that may be changed in at least one circuit in a plurality of circuits to minimize the differences in energy of the input signals or to minimize the energy of the difference signal. Parameters may include for example amplification, delay, and corner frequency values.The set of circuits may include microphone interface circuits. Merely by way of example, a system with microphone interface circuits may be included in a hearing enhancement device or in a hands-free earpiece.
摘要翻译： 系统包括多个输入，每个输入被配置为接收源信号的滤波版本。 该系统从每个输入信号中提取能量信息，并比较多个输入信号的能量信息。 或者，系统从作为两个输入信号的差的信号提取能量信息。 基于能量信息，系统确定可以在多个电路中的至少一个电路中改变的至少一个参数，以最小化输入信号的能量差异或最小化差分信号的能量。 参数可以包括例如放大，延迟和转角频率值。 该组电路可以包括麦克风接口电路。 仅举例来说，具有麦克风接口电路的系统可以包括在听力增强装置中或免提耳机中。
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公开(公告)号：US07642819B1
公开(公告)日：2010-01-05
申请号：US12191885
申请日：2008-08-14
IPC分类号： H03B1/00
摘要： An integrated circuit (100) includes a current mode write driver (105). The write driver (105) includes a switching control circuit (110) including (i) a DC current control circuit (111) operable to directly convert a received ECL differential signal into first, second, third and fourth DC output currents (a, b, c, and d) and (ii) a boost current control circuit (112) operable to directly convert a received level shifted version of the ECL differential voltage signal and a delayed version of the ECL differential voltage signal into first, second, third and fourth boost output currents (a1, b1, c1, and d1). An H-bridge circuit (120) includes an output stage (125) including first and second current sourcing control nodes (126, 127) and first and second current sinking control nodes (128, 129). A first output node (131) is between the first sourcing and first sinking nodes (126, 128) and second output node between the second sourcing and the second sinking nodes (127, 129). A first, second, third and fourth current mirror including input is coupled to sourcing or sinking control nodes (126, 127, 128, and 129) and are each operable to receive one of the DC output currents and one of the boost output currents for switchably delivering current diagonally through a load (145) connected between the output nodes (131, 132).
摘要翻译： 集成电路（100）包括电流模式写入驱动器（105）。 写驱动器（105）包括开关控制电路（110），其包括（i）直流电流控制电路（111），其可操作以将接收的ECL差分信号直接转换为第一，第二，第三和第四直流输出电流（a，b ，c和d）和（ii）升压电流控制电路（112），其可操作以将ECL差分电压信号的接收电平移位版本和ECL差分电压信号的延迟版本直接转换为第一，第二，第三和 第四升压输出电流（a1，b1，c1和d1）。 H桥电路（120）包括包括第一和第二电流源控制节点（126,127）和第一和第二电流吸收控制节点（128,129）的输出级（125）。 第一输出节点（131）位于第一源和第一沉没节点（126,128）之间，第二输出节点位于第二源和第二下沉节点（127,129）之间。 包括输入的第一，第二，第三和第四电流镜被耦合到采样或吸收控制节点（126,127,128和129），并且每个可操作以接收DC输出电流中的一个和一个升压输出电流，以供 可转换地通过连接在输出节点（131,132）之间的负载（145）对角地递送电流。
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公开(公告)号：US07646219B2
公开(公告)日：2010-01-12
申请号：US12191910
申请日：2008-08-14
IPC分类号： H03K19/0175
CPC分类号： H03K19/01714 , H03K19/017563
摘要： An integrated circuit (200) includes a translator circuit (210) for translating from a lower logic-level voltage range signal (101(a), 101(b)) to a higher logic-level voltage range signal (141(a), 141(b)). The translator (210) includes a differential input stage (110) including a first (Q39) and a second input transistor (Q38) coupled to receive at least a first input signal (101(a), 101(b)) that defines the lower voltage range signal. A voltage follower 120 includes first and second follower transistors (Q41, Q40). An output of the first and second input transistors (Q39, Q38) is coupled to inputs of the first and second follower transistors (Q41, Q40). A dynamic gain boosting switching circuit (130) is coupled to receive outputs from the first and second follower transistors (Q41, Q40) and includes a first and a second control node (131, 132). The switching circuit (130) include a first positive feedback loop including a first internal feedback transistor (MN1) that reinforces a signal level at the first control node (131) and a second positive feedback loop including a second internal feedback transistor (MN2) that reinforces a signal level at the second control node 132. An output stage (140) has at least one input coupled to receive at least one output signal from the switching circuit (130) and provide at least one translated output supplying the higher logic-level voltage range signal.
摘要翻译： 集成电路（200）包括用于从较低逻辑电平电压范围信号（101（a），101（b））转换到较高逻辑电平电压范围信号（141（a））的转换器电路（210） 141（b））。 转换器（210）包括差分输入级（110），其包括耦合以接收至少第一输入信号（101（a），101（b））的第一输入晶体管（Q39）和第二输入晶体管（Q38） 较低的电压范围信号。 电压跟随器120包括第一和第二跟随器晶体管（Q41，Q40）。 第一和第二输入晶体管（Q39，Q38）的输出耦合到第一和第二跟随器晶体管（Q41，Q40）的输入端。 动态增益升压开关电路（130）被耦合以接收来自第一和第二跟随器晶体管（Q41，Q40）的输出，并且包括第一和第二控制节点（131,132）。 开关电路（130）包括第一正反馈回路，其包括加强第一控制节点（131）处的信号电平的第一内部反馈晶体管（MN1）和包括第二内部反馈晶体管（MN2）的第二正反馈回路， 加强第二控制节点132处的信号电平。输出级（140）具有耦合以接收来自开关电路（130）的至少一个输出信号的至少一个输入，并提供至少一个转换输出，其提供较高逻辑电平 电压范围信号。
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公开(公告)号：US20090302890A1
公开(公告)日：2009-12-10
申请号：US12191910
申请日：2008-08-14
IPC分类号： H03K19/0175
CPC分类号： H03K19/01714 , H03K19/017563
摘要： An integrated circuit (200) includes a translator circuit (210) for translating from a lower logic-level voltage range signal (101(a), 101(b)) to a higher logic-level voltage range signal (141(a), 141(b)). The translator (210) includes a differential input stage (110) including a first (Q39) and a second input transistor (Q38) coupled to receive at least a first input signal (101(a), 101(b)) that defines the lower voltage range signal. A voltage follower 120 includes first and second follower transistors (Q41, Q40). An output of the first and second input transistors (Q39, Q38) is coupled to inputs of the first and second follower transistors (Q41, Q40). A dynamic gain boosting switching circuit (130) is coupled to receive outputs from the first and second follower transistors (Q41, Q40) and includes a first and a second control node (131, 132). The switching circuit (130) include a first positive feedback loop including a first internal feedback transistor (MN1) that reinforces a signal level at the first control node (131) and a second positive feedback loop including a second internal feedback transistor (MN2) that reinforces a signal level at the second control node 132. An output stage (140) has at least one input coupled to receive at least one output signal from the switching circuit (130) and provide at least one translated output supplying the higher logic-level voltage range signal.
摘要翻译： 集成电路（200）包括用于从较低逻辑电平电压范围信号（101（a），101（b））转换到较高逻辑电平电压范围信号（141（a））的转换器电路（210） 141（b））。 转换器（210）包括差分输入级（110），其包括耦合以接收至少第一输入信号（101（a），101（b））的第一输入晶体管（Q39）和第二输入晶体管（Q38） 较低的电压范围信号。 电压跟随器120包括第一和第二跟随器晶体管（Q41，Q40）。 第一和第二输入晶体管（Q39，Q38）的输出耦合到第一和第二跟随器晶体管（Q41，Q40）的输入端。 动态增益升压开关电路（130）被耦合以接收来自第一和第二跟随器晶体管（Q41，Q40）的输出，并且包括第一和第二控制节点（131,132）。 开关电路（130）包括第一正反馈回路，其包括加强第一控制节点（131）处的信号电平的第一内部反馈晶体管（MN1）和包括第二内部反馈晶体管（MN2）的第二正反馈回路， 加强第二控制节点132处的信号电平。输出级（140）具有耦合以接收来自开关电路（130）的至少一个输出信号的至少一个输入，并提供至少一个转换输出，其提供较高逻辑电平 电压范围信号。
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