公开(公告)号：US20130026883A1

公开(公告)日：2013-01-31

申请号：US13633004

申请日：2012-10-01

Applicant: Seagate Technology LLC

Inventor： Michael Christopher Kautzky ,  Charles Everett Hawkinson ,  Daniel Paul Burbank ,  John Stuart Wright

IPC: H01L41/22

CPC classification number: H02H3/08 ,  G11B5/4826 ,  G11B5/4873 ,  G11B5/6005 ,  H01L41/1132 ,  H01L41/257 ,  H01L41/338 ,  Y10T29/42

Abstract: A system for poling piezoelectric devices comprises a plurality of thin-film components, a plurality of piezoelectric devices, a poling pad for poling the piezoelectric devices, a plurality of traces, and a plurality of current-limiting elements. The thin-film components are separated by dice lanes to form an array, and the piezoelectric devices are formed on the thin-film components. The traces connect the piezoelectric devices across the dice lanes in parallel to the poling pad. Each current-limiting element is connected in series with one of the piezoelectric devices, in order to limit current to individual piezoelectric devices that experience current-related failure.

Abstract translation: 用于极化压电装置的系统包括多个薄膜部件，多个压电装置，用于极化压电装置的极化垫，多个迹线和多个限流元件。 薄膜部件通过骰子线分隔开形成阵列，并且压电元件形成在薄膜部件上。 迹线将压电元件跨过骰子通道平行于极化垫。 每个限流元件与压电器件之一串联连接，以便将电流限制到经历电流相关故障的各个压电器件。

公开(公告)号：US08937790B2

公开(公告)日：2015-01-20

申请号：US13914379

申请日：2013-06-10

Applicant: Seagate Technology LLC

Inventor： Michael Christopher Kautzky ,  Charles Everett Hawkinson ,  Daniel Paul Burbank ,  John Stuart Wright

IPC: G11B5/60

CPC classification number: H02H3/08 ,  G11B5/4826 ,  G11B5/4873 ,  G11B5/6005 ,  H01L41/1132 ,  H01L41/257 ,  H01L41/338 ,  Y10T29/42

Abstract: A system for poling piezoelectric devices comprises a plurality of thin-film components, a plurality of piezoelectric devices, a poling pad for poling the piezoelectric devices, a plurality of traces, and a plurality of current-limiting elements. The thin-film components are separated by dice lanes to form an array, and the piezoelectric devices are formed on the thin-film components. The traces connect the piezoelectric devices across the dice lanes in parallel to the poling pad. Each current-limiting element is connected in series with one of the piezoelectric devices, in order to limit current to individual piezoelectric devices that experience current-related failure.

Abstract translation: 用于极化压电装置的系统包括多个薄膜部件，多个压电装置，用于极化压电装置的极化垫，多个迹线和多个限流元件。 薄膜部件通过骰子线分隔开形成阵列，并且压电元件形成在薄膜部件上。 迹线将压电元件跨过骰子通道平行于极化垫。 每个限流元件与压电器件之一串联连接，以便将电流限制到经历电流相关故障的各个压电器件。

公开(公告)号：US08477456B2

公开(公告)日：2013-07-02

申请号：US13633004

申请日：2012-10-01

Applicant: Seagate Technology LLC

Inventor： Michael Christopher Kautzky ,  Charles Everett Hawkinson ,  Daniel Paul Burbank ,  John Stuart Wright

IPC: G11B5/60

CPC classification number: H02H3/08 ,  G11B5/4826 ,  G11B5/4873 ,  G11B5/6005 ,  H01L41/1132 ,  H01L41/257 ,  H01L41/338 ,  Y10T29/42

Abstract: A system for poling piezoelectric devices comprises a plurality of thin-film components, a plurality of piezoelectric devices, a poling pad for poling the piezoelectric devices, a plurality of traces, and a plurality of current-limiting elements. The thin-film components are separated by dice lanes to form an array, and the piezoelectric devices are formed on the thin-film components. The traces connect the piezoelectric devices across the dice lanes in parallel to the poling pad. Each current-limiting element is connected in series with one of the piezoelectric devices, in order to limit current to individual piezoelectric devices that experience current-related failure.

公开(公告)号：US20130271889A1

公开(公告)日：2013-10-17

申请号：US13914379

申请日：2013-06-10

Applicant: Seagate Technology LLC

Inventor： Michael Christopher Kautzky ,  Charles Everett Hawkinson ,  Daniel Paul Burbank ,  John Stuart Wright

IPC: H02H3/08 ,  H01L41/257

CPC classification number: H02H3/08 ,  G11B5/4826 ,  G11B5/4873 ,  G11B5/6005 ,  H01L41/1132 ,  H01L41/257 ,  H01L41/338 ,  Y10T29/42

Abstract: A system for poling piezoelectric devices comprises a plurality of thin-film components, a plurality of piezoelectric devices, a poling pad for poling the piezoelectric devices, a plurality of traces, and a plurality of current-limiting elements. The thin-film components are separated by dice lanes to form an array, and the piezoelectric devices are formed on the thin-film components. The traces connect the piezoelectric devices across the dice lanes in parallel to the poling pad. Each current-limiting element is connected in series with one of the piezoelectric devices, in order to limit current to individual piezoelectric devices that experience current-related failure.