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    Confirming a version of firmware loaded to a processor-based device
    1.
    发明授权
    Confirming a version of firmware loaded to a processor-based device 有权

    公开(公告)号：US11409872B2

    公开(公告)日：2022-08-09

    申请号：US16674740

    申请日：2019-11-05

    Applicant: Seagate Technology LLC

    Inventor： Michael H. Miller

    IPC: G06F21/00 ,  G06F21/56

    Abstract: Apparatus and method for verifying firmware used by a programmable processor in a processor-based device, such as but not limited to a solid-state drive (SSD). In some embodiments, the firmware is stored in a device memory and is accessed to generate an output value using a suitable mathematical function, such as a cryptographic function, a cyclic redundancy check (CRC) function, etc. The output value is used to verify a state of the firmware, such as by ensuring a proper version of firmware has been loaded, that an attacking party has not tampered with the firmware, etc. The firmware may be subsequently loaded and executed by the programmable processor responsive to successful verification. A nonce value supplied by a host can be incorporated into the output value generation process.

    DATA STORAGE DEVICE WITH SECURITY MODULE
    3.
    发明申请
    DATA STORAGE DEVICE WITH SECURITY MODULE 有权

    公开(公告)号：US20210250374A1

    公开(公告)日：2021-08-12

    申请号：US16786368

    申请日：2020-02-10

    Applicant: Seagate Technology LLC

    Inventor： Michael H. Miller

    IPC: H04L29/06 ,  H04L9/08 ,  H04L29/08 ,  G06F21/78

    Abstract: A distributed data storage system can consist an attack module connected to distributed data storage system that has at least one host connected to a first data storage device and a second data storage device via a network controller. A susceptibility to a third-party attack in the distributed data storage system may be identified with the attack module, which prompts the generation of an attack counter strategy with the attack module. The attack counter strategy can have at least one proactive action directed at preventing a future third-party attack on the detected susceptibility that is executed prior to a third-party attack to temporarily randomize execution timing of a data access operation of the distributed data storage system.

    Data storage device with security module
    5.
    发明授权
    Data storage device with security module 有权

    公开(公告)号：US11736517B2

    公开(公告)日：2023-08-22

    申请号：US16786368

    申请日：2020-02-10

    Applicant: Seagate Technology LLC

    Inventor： Michael H. Miller

    IPC: H04L9/32 ,  G06F9/00 ,  H04L9/40 ,  G06F21/78 ,  H04L9/08 ,  H04L67/1097

    CPC classification number: H04L63/1466 ,  G06F21/78 ,  H04L9/0869 ,  H04L63/1416 ,  H04L63/1433 ,  H04L67/1097

    Abstract: A distributed data storage system can consist an attack module connected to distributed data storage system that has at least one host connected to a first data storage device and a second data storage device via a network controller. A susceptibility to a third-party attack in the distributed data storage system may be identified with the attack module, which prompts the generation of an attack counter strategy with the attack module. The attack counter strategy can have at least one proactive action directed at preventing a future third-party attack on the detected susceptibility that is executed prior to a third-party attack to temporarily randomize execution timing of a data access operation of the distributed data storage system.

    Randomizing firmware loaded to a processor memory
    6.
    发明授权
    Randomizing firmware loaded to a processor memory 有权

    公开(公告)号：US11347860B2

    公开(公告)日：2022-05-31

    申请号：US16674772

    申请日：2019-11-05

    Applicant: Seagate Technology LLC

    Inventor： Michael H. Miller

    IPC: G06F21/57 ,  G06F7/58

    Abstract: Apparatus and method for protecting firmware and other types of control data used in a processor-based device, such as but not limited to a solid-state drive (SSD). In some embodiments, the firmware is stored in a firmware store as a plurality of program instructions in a first sequence. The program instructions are loaded to a local memory in a different, second sequence. In some cases, a random number is generated and the second sequence is selected using the random number. A translation table may be generated and used by a programmable processor to locate the various program instructions in the second sequence. In other cases, instructions with calls and other references to other instruction lines are modified based on the order in the local memory. Other forms of control data may also be generated and stored to the local memory in a random order and interspersed with the firmware.

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