Logical block addresses used for executing host commands
    2.
    发明授权
    Logical block addresses used for executing host commands 有权
    用于执行主机命令的逻辑块地址

    公开(公告)号:US09542122B2

    公开(公告)日:2017-01-10

    申请号:US14522160

    申请日:2014-10-23

    Abstract: A logical block address space of a storage compute device is reserved for use in executing commands from a host. The logical block address space is not mapped to a physical address space. First data is received at a first portion of the logical block address space, the first data causing a computation to be performed by the storage compute device. Second data is sent to the host via a second portion of the logical block address space, the second data describing a result of the computation.

    Abstract translation: 保留用于执行来自主机的命令的存储计算设备的逻辑块地址空间。 逻辑块地址空间未映射到物理地址空间。 第一数据在逻辑块地址空间的第一部分被接收,第一数据导致由存储计算设备执行计算。 第二数据经由逻辑块地址空间的第二部分发送到主机,第二数据描述计算结果。

    PASS THROUGH STORAGE DEVICES
    3.
    发明申请
    PASS THROUGH STORAGE DEVICES 审中-公开
    通过存储设备传递

    公开(公告)号:US20160011965A1

    公开(公告)日:2016-01-14

    申请号:US14028528

    申请日:2013-09-16

    Abstract: The disclosure is directed to apparatus and methods for implementing a pass through storage architecture that converts. Embodiments generally include a control circuit configured to allocate data among at least a first memory tier and a second memory tier. The first memory tier can include a solid state memory and the second memory tier can include a nonvolatile memory. In some embodiments, a pass-through storage device may be implemented. Embodiments may further include one or more interfaces configured to allow communication between the control circuit and one or more memories, devices, systems, or any combination thereof.

    Abstract translation: 本公开涉及用于实现转换的通过存储体系结构的装置和方法。 实施例通常包括被配置为在至少第一存储器层和第二存储器层之间分配数据的控制电路。 第一存储器层可以包括固态存储器,并且第二存储器层可以包括非易失性存储器。 在一些实施例中,可以实现直通存储设备。 实施例还可以包括被配置为允许控制电路与一个或多个存储器,设备,系统或其任何组合之间的通信的一个或多个接口。

    STORAGE OF A MATRIX ON A STORAGE COMPUTE DEVICE
    5.
    发明申请
    STORAGE OF A MATRIX ON A STORAGE COMPUTE DEVICE 审中-公开
    存储计算设备上的矩阵存储

    公开(公告)号:US20150326245A1

    公开(公告)日:2015-11-12

    申请号:US14704128

    申请日:2015-05-05

    CPC classification number: G06F17/16 H03M7/30 H03M7/4031

    Abstract: A compressed format is selected for storage of a matrix based on a computation to be performed using the matrix and architecture of a storage compute device to which the matrix is stored. Data of the matrix is stored on the storage compute device according to the compressed format. The computation is performed using the data via a computation unit that resides within the storage compute device.

    Abstract translation: 选择用于存储矩阵的压缩格式,该矩阵基于要使用存储矩阵的存储计算设备的矩阵和架构来执行的计算。 矩阵的数据根据​​压缩格式存储在存储计算设备上。 使用驻留在存储计算设备内的计算单元使用数据来执行计算。

    STORAGE COMPUTE DEVICE WITH TIERED MEMORY PROCESSING
    6.
    发明申请
    STORAGE COMPUTE DEVICE WITH TIERED MEMORY PROCESSING 有权
    具有分层存储处理的存储电脑设备

    公开(公告)号:US20150324125A1

    公开(公告)日:2015-11-12

    申请号:US14704111

    申请日:2015-05-05

    Abstract: A data object is received at a storage compute device in response to a request from a host. A requirement of the data object is determined based on a computation to be performed on the data object. The requirement related to at least speed and capacity of media used to store the data object. A tier is selected from the storage compute device based on speed and capacity characteristics of the selected tier corresponding to the requirement of the data object. The data object is stored in the selected tier.

    Abstract translation: 响应于来自主机的请求,在存储计算设备处接收数据对象。 基于要对数据对象执行的计算来确定数据对象的要求。 该要求至少与用于存储数据对象的媒体的速度和容量有关。 基于与数据对象的要求相对应的所选层的速度和容量特性,从存储计​​算设备中选择层。 数据对象存储在所选层中。

    Peer to peer vibration mitigation
    8.
    发明授权
    Peer to peer vibration mitigation 有权
    同步振动减振

    公开(公告)号:US08824261B1

    公开(公告)日:2014-09-02

    申请号:US13788548

    申请日:2013-03-07

    CPC classification number: G11B33/142 G11B33/08

    Abstract: A system for peer-to-peer vibration mitigation in a distributing computing system includes a secondary communication interface over which chassis management electronics (e.g., a chassis-level controller) and/or system storage nodes may initiate communications to in order to affect system changes that may decrease vibration-related performance degradation in the system.

    Abstract translation: 在分配计算系统中用于对等减振的系统包括辅助通信接口,通过该辅助通信接口,机箱管理电子设备(例如,机箱级控制器)和/或系统存储节点可以发起通信以便影响系统变化 这可能会降低系统中与振动有关的性能下降。

    Distributed power delivery
    9.
    发明授权
    Distributed power delivery 有权
    分布式供电

    公开(公告)号:US09329910B2

    公开(公告)日:2016-05-03

    申请号:US13923040

    申请日:2013-06-20

    CPC classification number: G06F9/5094 G06F1/26 G06F1/3203 Y02D10/22

    Abstract: Systems and methods are disclosed for distributed power delivery. In certain embodiments, an apparatus may comprise a device configured to control power to one or more power-consuming components via managing power usage among the one or more power-consuming components based on a priority of a task associated with the one or more power-consuming components. In certain embodiments, a device may comprise a processor configured to: receive a request to allow a component to expend an amount of power, determine if the request can be satisfied with an unallocated power budget managed by the processor, the unallocated power budget being an unallocated portion of a total power budget managed by the first processor, and allow the component to expend the amount of power when the request can be satisfied with the unallocated power budget.

    Abstract translation: 公开了用于分布式电力传送的系统和方法。 在某些实施例中,装置可以包括被配置为基于与一个或多个功率消耗组件相关联的任务的优先级来管理一个或多个功耗组件之间的功率使用来向一个或多个功耗组件控制功率的设备, 消耗部件。 在某些实施例中,设备可以包括处理器,其被配置为:接收允许组件消耗一定功率的请求,确定该请求是否可满足由处理器管理的未分配功率预算,未分配功率预算为 由第一处理器管理的总功率预算的未分配部分,并且当该请求可以满足未分配的功率预算时,允许该组件消耗该功率量。

    LOGICAL BLOCK ADDRESSES USED FOR EXECUTING HOST COMMANDS
    10.
    发明申请
    LOGICAL BLOCK ADDRESSES USED FOR EXECUTING HOST COMMANDS 有权
    用于执行主机命令的逻辑块地址

    公开(公告)号:US20160117121A1

    公开(公告)日:2016-04-28

    申请号:US14522160

    申请日:2014-10-23

    Abstract: A logical block address space of a storage compute device is reserved for use in executing commands from a host. The logical block address space is not mapped to a physical address space. First data is received at a first portion of the logical block address space, the first data causing a computation to be performed by the storage compute device. Second data is sent to the host via a second portion of the logical block address space, the second data describing a result of the computation.

    Abstract translation: 保留用于执行来自主机的命令的存储计算设备的逻辑块地址空间。 逻辑块地址空间未映射到物理地址空间。 第一数据在逻辑块地址空间的第一部分被接收,第一数据导致由存储计算设备执行计算。 第二数据经由逻辑块地址空间的第二部分发送到主机,第二数据描述计算结果。

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