公开(公告)号：US10033408B2

公开(公告)日：2018-07-24

申请号：US15290880

申请日：2016-10-11

Applicant: Seagate Technology LLC

Inventor： Ara Patapoutian ,  Bruce Buch ,  Rose Shao

IPC: H03M13/11 ,  H03M13/37 ,  H03M13/00 ,  H04L1/00

Abstract: An iterative decoder is controlled to iteratively decode a block by performing one or more decoding iterations for the block. The iterative decoder uses a parity-check matrix and can be configured to process that parity-check matrix for parallel, sequential or a combination of parallel and sequential (“hybrid”) parity constraint updates.

公开(公告)号：US09559725B1

公开(公告)日：2017-01-31

申请号：US14061344

申请日：2013-10-23

Applicant: Seagate Technology LLC

Inventor： Rose Shao ,  Ara Patapoutian

IPC: H03M13/29 ,  H03M13/15

CPC classification number: H03M13/2936 ,  H03M13/1102 ,  H03M13/1515 ,  H03M13/2906 ,  H03M13/2909 ,  H03M13/2948 ,  H03M13/356

Abstract: A coding device, such as a memory device or communication system, comprising encoder circuitry configured to encode data into inner codewords and multiple-strength Reed-Solomon outer codewords, the Reed-Solomon outer codewords including weak strength, mid-strength, and strong strength. The strength of the codewords can be varied by changing at least one of the code length N, data length K, parity length R, symbol size S and code rate K/N.

Abstract translation: 诸如存储器装置或通信系统的编码装置包括编码器电路，其被配置为将数据编码成内部码字和多重强度Reed-Solomon外部码字，所述Reed-Solomon外部码字包括弱强度，中等强度和强度 。 可以通过改变代码长度N，数据长度K，奇偶校验长度R，符号大小S和码率K / N中的至少一个来改变码字的强度。

公开(公告)号：US20170033805A1

公开(公告)日：2017-02-02

申请号：US15290880

申请日：2016-10-11

Applicant: Seagate Technology LLC

Inventor： Ara Patapoutian ,  Bruce Buch ,  Rose Shao

IPC: H03M13/11 ,  H03M13/00 ,  H03M13/37

CPC classification number: H03M13/1111 ,  H03M13/1105 ,  H03M13/3738 ,  H03M13/3746 ,  H03M13/3784 ,  H03M13/616 ,  H03M13/6325 ,  H04L1/0057

Abstract: An iterative decoder is controlled to iteratively decode a block by performing one or more decoding iterations for the block. The iterative decoder uses a parity-check matrix and can be configured to process that parity-check matrix for parallel, sequential or a combination of parallel and sequential (“hybrid”) parity constraint updates.

Abstract translation: 控制迭代解码器以通过对该块执行一个或多个解码迭代来迭代地解码块。 迭代解码器使用奇偶校验矩阵，并且可以被配置为处理用于并行，顺序或并行和顺序（“混合”）奇偶校验约束更新的组合的奇偶校验矩阵。