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    Fast decoding of data stored in a flash memory
    1.
    发明授权
    Fast decoding of data stored in a flash memory 有权

    公开(公告)号：US09954558B1

    公开(公告)日：2018-04-24

    申请号：US15059397

    申请日：2016-03-03

    申请人： Avago Technologies General IP (Singapore) Pte. Ltd.

    发明人： Avi Steiner ,  Avigdor Segal ,  Hanan Weingarten

    IPC分类号： H03M13/37 ,  G06F11/10 ,  H03M13/29 ,  G11C16/26

    CPC分类号： H03M13/3784 ,  G06F11/1068 ,  G11C11/5642 ,  G11C16/26 ,  G11C29/00 ,  G11C29/52 ,  H03M13/2918

    摘要： A method for fast decoding, the method may include (a) performing a hard read of a group of flash memory cells to provide hard read data; wherein the group of flash memory cells store a codeword that comprises component codes of multiple dimensions; (b) hard decoding the hard read data to provide a hard decoding result; wherein the hard decoding result comprises first suggested values of component codes of at least one dimension of the multiple dimensions; (c) performing at least one additional read attempt of the group of flash memory cells to provide additional data; (d) performing a partial extensiveness soft decoding the additional data, in response to the first suggested values, to provide a soft decoding result; and (e) wherein the soft decoding result comprises second suggested values of component codes of one or more dimensions of the multiple dimensions.

    Adaptive data interference cancellation
    2.
    发明授权
    Adaptive data interference cancellation 有权

    公开(公告)号：US09794026B2

    公开(公告)日：2017-10-17

    申请号：US14245155

    申请日：2014-04-04

    申请人： QUALCOMM Incorporated

    发明人： Alan Barbieri ,  Tao Luo

    IPC分类号： H04L1/00 ,  H04B1/10 ,  H04L5/00 ,  H04W24/02 ,  H04J11/00 ,  H03M13/37 ,  H04W84/04

    CPC分类号： H04L1/005 ,  H03M13/3746 ,  H03M13/3784 ,  H04J11/004 ,  H04J11/0043 ,  H04J11/005 ,  H04L1/0048 ,  H04L5/0032 ,  H04W24/02 ,  H04W84/045

    摘要： Real-time selection of interference cancellation schemes based on transmission parameters and amount of resource overlap between the desired payload and the interfering payload. Codeword level interference cancellation may be performed where the signal quality of the interfering signal indicates that the interfering payload will be decoded correctly. When performed, codeword level interference cancellation may be monitored to determine if decoding the interfering payload is converging. Other interference cancellation schemes may be selected based on the signal quality of the interfering signal or non-converging decode of the interfering payload. The number of iterations for iterative decoding in codeword level interference cancellation may be dynamically selected. The decoder output (e.g., soft bits) may be used to perform interference cancellations before the decoder is fully converged. Iterative decoding may be performed in multiple passes and soft decision output form one pass may be used to initialize the decoder for a subsequent pass.

    ADAPTIVE DATA INTERFERENCE CANCELLATION
    5.
    发明申请
    ADAPTIVE DATA INTERFERENCE CANCELLATION 审中-公开
    自适应数据干扰消除

    公开(公告)号：US20160269144A1

    公开(公告)日：2016-09-15

    申请号：US15158094

    申请日：2016-05-18

    申请人： QUALCOMM Incorporated

    发明人： Alan Barbieri ,  Tao Luo

    IPC分类号： H04L1/00 ,  H03M13/37 ,  H04J11/00

    CPC分类号： H04L1/005 ,  H03M13/3746 ,  H03M13/3784 ,  H04J11/004 ,  H04J11/0043 ,  H04J11/005 ,  H04L1/0048 ,  H04L5/0032 ,  H04W24/02 ,  H04W84/045

    摘要： Real-time selection of interference cancellation schemes based on transmission parameters and amount of resource overlap between the desired payload and the interfering payload. Codeword level interference cancellation may be performed where the signal quality of the interfering signal indicates that the interfering payload will be decoded correctly. When performed, codeword level interference cancellation may be monitored to determine if decoding the interfering payload is converging. Other interference cancellation schemes may be selected based on the signal quality of the interfering signal or non-converging decode of the interfering payload. The number of iterations for iterative decoding in codeword level interference cancellation may be dynamically selected. The decoder output (e.g., soft bits) may be used to perform interference cancellations before the decoder is fully converged. Iterative decoding may be performed in multiple passes and soft decision output form one pass may be used to initialize the decoder for a subsequent pass.

    摘要翻译： 基于传输参数和所需有效载荷与干扰有效载荷之间的资源重叠量的干扰消除方案的实时选择。 可以在干扰信号的信号质量指示干扰有效负载将被正确解码的情况下执行码字级干扰消除。 当执行时，可以监视码字电平干扰消除以确定对干扰有效载荷的解码是否正在收敛。 可以基于干扰信号的信号质量或干扰有效负载的非收敛解码来选择其他干扰消除方案。 可以动态地选择码字电平干扰消除中迭代解码的迭代次数。 解码器输出（例如，软比特）可以在解码器完全收敛之前用于执行干扰消除。 可以在多遍中执行迭代解码，并且可以使用一次通过的软判决输出来初始化用于后续通过的解码器。

    FORWARD ERROR CORRECTION WITH TURBO/NON-TURBO SWITCHING
    7.
    发明申请
    FORWARD ERROR CORRECTION WITH TURBO/NON-TURBO SWITCHING 有权
    带涡轮/非涡轮开关的前向错误校正

    公开(公告)号：US20150326253A1

    公开(公告)日：2015-11-12

    申请号：US14704385

    申请日：2015-05-05

    申请人： Cisco Technology, Inc.

    发明人： Andreas Bisplinghoff ,  Stefan Langenbach ,  Norbert Beck

    IPC分类号： H03M13/37 ,  H03M13/45 ,  H03M13/25 ,  H03M13/11 ,  H03M13/00

    CPC分类号： H03M13/3746 ,  H03M13/1102 ,  H03M13/1111 ,  H03M13/258 ,  H03M13/2957 ,  H03M13/336 ,  H03M13/3715 ,  H03M13/3784 ,  H03M13/45 ,  H03M13/458 ,  H03M13/616 ,  H03M13/6325 ,  H03M13/6337 ,  H04L1/0045

    摘要： A forward error correction and differentially encoded signal obtained via a communication channel is supplied to a soft-input soft-output (SISO) differential decoder that is bi-directionally coupled to a SISO forward error correction decoder. Over a first portion of a plurality of decoding iterations of the differentially encoded signal, the SISO differential decoder and the SISO forward error correction decoder are operated in a turbo decoding mode in which decoded messages generated by the SISO differential decoder are supplied to the SISO forward error correction decoder and forward error correction messages are supplied to the differential decoder. Over a second portion of the plurality of decoding iterations of the differentially encoded signal, the SISO forward error correction decoder is operated in a non-turbo decoding mode without any messages passing to and from the SISO differential decoder. Decoder output is obtained from the SISO forward error correction decoder.

    摘要翻译： 经由通信信道获得的前向纠错和差分编码信号被提供给双向耦合到SISO前向纠错解码器的软输入软输出（SISO）差分解码器。 在差分编码信号的多个解码迭代的第一部分中，SISO差分解码器和SISO前向纠错解码器以turbo解码模式操作，其中由SISO差分解码器产生的解码信息被提供给SISO前向 纠错解码器和前向纠错消息被提供给差分解码器。 在差分编码信号的多个解码迭代的第二部分上，SISO前向纠错解码器以非turbo解码模式操作，而没有任何消息传送到SISO差分解码器。 解码器输出从SISO前向纠错解码器获得。

    SISO decoder for a block code
    10.
    发明申请
    SISO decoder for a block code 有权
    SISO解码器用于块代码

    公开(公告)号：US20120076247A1

    公开(公告)日：2012-03-29

    申请号：US12929434

    申请日：2011-01-25

    申请人： Chun-Chieh Tseng

    发明人： Chun-Chieh Tseng

    IPC分类号： H03D1/00

    CPC分类号： H03M13/3784 ,  H03M13/1102 ,  H03M13/21 ,  H03M13/2906 ,  H03M13/451

    摘要： A soft-in-soft-out (SISO) decoder for a general block code includes a source bit generator which generates k guessed source bits; a channel encoder which maps the k guessed source bits to an n-bit channel codeword; a QAM symbol mapper which generates a locally generated symbol sequence comprising m consecutive QAM symbols based on the n-bit channel codeword; a correlator which receives a symbol sequence, a channel state information sequence, and the locally generated symbol sequence to calculate a correlation associated with the received symbol sequence based on the received symbol sequence, the channel state information sequence, and the locally generated symbol sequence; and a log-likelihood ratio calculator which is connected to the source bit generator and the correlator to thereby calculate the required log-likelihood ratios associated with all coded bits corresponding to the received symbol sequence.

    摘要翻译： 用于通用块码的软进软（SISO）解码器包括产生k个猜测源比特的源比特发生器; 将k个猜测的源比特映射到n比特信道码字的信道编码器; QAM符号映射器，其基于所述n位信道码字生成包括m个连续QAM符号的本地生成的符号序列; 相关器，其接收符号序列，信道状态信息序列和本地生成的符号序列，以基于接收的符号序列，信道状态信息序列和本地产生的符号序列来计算与接收到的符号序列相关联的相关性; 以及对数似然比计算器，其连接到源比特发生器和相关器，从而计算与对应于所接收的符号序列的所有编码比特相关联的所需对数似然比。