公开(公告)号：US09076825B2

公开(公告)日：2015-07-07

申请号：US14162364

申请日：2014-01-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiaki Yamamoto ,  Koichi Ito ,  Motomu Kurata ,  Taiga Muraoka ,  Daigo Ito

IPC: H01L29/10 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

Abstract: When an oxide semiconductor film is microfabricated to have an island shape, with the use of a hard mask, unevenness of an end portion of the oxide semiconductor film can be suppressed. Specifically, a hard mask is formed over the oxide semiconductor film, a resist is formed over the hard mask, light exposure is performed to form a resist mask, the hard mask is processed using the resist mask as a mask, the oxide semiconductor film is processed using the processed hard mask as a mask, the resist mask and the processed hard mask are removed, a source electrode and a drain electrode are formed in contact with the processed oxide semiconductor film, a gate insulating film is formed over the source electrode and the drain electrode, and a gate electrode is formed over the gate insulating film, the gate electrode overlapping with the oxide semiconductor film.

Abstract translation: 当氧化物半导体膜被微细化以具有岛状时，通过使用硬掩模，可以抑制氧化物半导体膜的端部的不均匀性。 具体地，在氧化物半导体膜上形成硬掩模，在硬掩模上形成抗蚀剂，进行曝光以形成抗蚀剂掩模，使用抗蚀剂掩模作为掩模来处理硬掩模，氧化物半导体膜为 使用处理后的硬掩模作为掩模处理，除去抗蚀剂掩模和加工的硬掩模，形成与处理的氧化物半导体膜接触的源电极和漏电极，在源极上形成栅极绝缘膜， 漏电极和栅电极形成在栅极绝缘膜上方，栅电极与氧化物半导体膜重叠。

公开(公告)号：US20140209898A1

公开(公告)日：2014-07-31

申请号：US14162364

申请日：2014-01-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiaki Yamamoto ,  Koichi Ito ,  Motomu Kurata ,  Taiga Muraoka ,  Daigo Ito

IPC: H01L29/66 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

Abstract: When an oxide semiconductor film is microfabricated to have an island shape, with the use of a hard mask, unevenness of an end portion of the oxide semiconductor film can be suppressed. Specifically, a hard mask is formed over the oxide semiconductor film, a resist is formed over the hard mask, light exposure is performed to form a resist mask, the hard mask is processed using the resist mask as a mask, the oxide semiconductor film is processed using the processed hard mask as a mask, the resist mask and the processed hard mask are removed, a source electrode and a drain electrode are formed in contact with the processed oxide semiconductor film, a gate insulating film is formed over the source electrode and the drain electrode, and a gate electrode is formed over the gate insulating film, the gate electrode overlapping with the oxide semiconductor film.

Abstract translation: 当氧化物半导体膜被微细化以具有岛状时，通过使用硬掩模，可以抑制氧化物半导体膜的端部的不均匀性。 具体地，在氧化物半导体膜上形成硬掩模，在硬掩模上形成抗蚀剂，进行曝光以形成抗蚀剂掩模，使用抗蚀剂掩模作为掩模来处理硬掩模，氧化物半导体膜为 使用处理后的硬掩模作为掩模处理，除去抗蚀剂掩模和加工的硬掩模，形成与处理的氧化物半导体膜接触的源电极和漏电极，在源极上形成栅极绝缘膜， 漏电极和栅电极形成在栅极绝缘膜上方，栅电极与氧化物半导体膜重叠。