公开(公告)号：US20170338246A1

公开(公告)日：2017-11-23

申请号：US15596408

申请日：2017-05-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daisuke KUBOTA ,  Yuji IWAKI ,  Kensuke YOSHIZUMI ,  Mari TATEISHI ,  Natsuko TAKASE

IPC: H01L27/12 ,  G02F1/1335 ,  G02F1/1362 ,  H01L27/32

CPC classification number: H01L27/124 ,  G02F1/133305 ,  G02F1/133528 ,  G02F1/13458 ,  G02F1/136286 ,  G02F2001/136222 ,  H01L27/1225 ,  H01L27/3276

Abstract: A highly reliable display device is provided. The display device includes a first substrate, a first resin layer over the first substrate, a pixel portion and a terminal portion over the first resin layer, a second resin layer over the terminal portion, and a second substrate over the second resin layer. The pixel portion includes a transistor and a display element electrically connected to the transistor. The terminal portion includes a conductive layer. The first resin layer includes an opening. The conductive layer includes a first region that is exposed in the opening in the first resin layer. The second resin layer includes a region overlapping with the first region. The conductive layer is the same layer as at least one of a gate of the transistor and a source and a drain of the transistor.

公开(公告)号：US20190035820A1

公开(公告)日：2019-01-31

申请号：US16143970

申请日：2018-09-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junpei YANAKA ,  Kayo KUMAKURA ,  Masataka SATO ,  Satoru IDOJIRI ,  Kensuke YOSHIZUMI ,  Mari TATEISHI ,  Natsuko TAKASE

IPC: H01L27/12 ,  H01L23/29 ,  H01L27/32 ,  H01L51/00

CPC classification number: H01L27/1225 ,  H01L23/293 ,  H01L27/124 ,  H01L27/1266 ,  H01L27/3262 ,  H01L51/003 ,  H01L2227/323

Abstract: To provide a peeling method that achieves low cost and high mass productivity. The peeling method includes the steps of: forming a first layer with a photosensitive material over a formation substrate; forming a first region and a second region having a smaller thickness than the first region in the first layer by photolithography to form a resin layer having the first region and the second region; forming a transistor including an oxide semiconductor in a channel formation region over the first region in the resin layer; forming a conductive layer over the second region in the resin layer; and irradiating the resin layer with laser light to separate the transistor and the formation substrate.

公开(公告)号：US20170338250A1

公开(公告)日：2017-11-23

申请号：US15596412

申请日：2017-05-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junpei YANAKA ,  Kayo KUMAKURA ,  Masataka SATO ,  Satoru IDOJIRI ,  Kensuke YOSHIZUMI ,  Mari TATEISHI ,  Natsuko TAKASE

IPC: H01L27/12 ,  H01L23/29 ,  H01L27/32

CPC classification number: H01L27/1225 ,  H01L23/293 ,  H01L27/124 ,  H01L27/1266 ,  H01L27/3262 ,  H01L51/003 ,  H01L2227/323

Abstract: To provide a peeling method that achieves low cost and high mass productivity. The peeling method includes the steps of: forming a first layer with a photosensitive material over a formation substrate; forming a first region and a second region having a smaller thickness than the first region in the first layer by photolithography to form a resin layer having the first region and the second region; forming a transistor including an oxide semiconductor in a channel formation region over the first region in the resin layer; forming a conductive layer over the second region in the resin layer; and irradiating the resin layer with laser light to separate the transistor and the formation substrate.