公开(公告)号：US20150008430A1

公开(公告)日：2015-01-08

申请号：US14492559

申请日：2014-09-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Teruyuki FUJII ,  Sho NAGAMATSU

IPC: H01L29/786 ,  H01L23/00 ,  H01L29/36

CPC classification number: H01L29/7869 ,  H01L23/564 ,  H01L29/36 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78621 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A base insulating film is formed over a substrate. A first oxide semiconductor film is formed over the base insulating film, and then first heat treatment is performed to form a second oxide semiconductor film. Then, selective etching is performed to form a third oxide semiconductor film. An insulating film is formed over the first insulating film and the third oxide semiconductor film. A surface of the insulating film is polished to expose a surface of the third oxide semiconductor film, so that a sidewall insulating film is formed in contact with at least a side surface of the third oxide semiconductor film. Then, a source electrode and a drain electrode are formed over the sidewall insulating film and the third oxide semiconductor film. A gate insulating film and a gate electrode are formed.

Abstract translation: 在基板上形成基极绝缘膜。 在基底绝缘膜上形成第一氧化物半导体膜，然后进行第一热处理以形成第二氧化物半导体膜。 然后，进行选择性蚀刻以形成第三氧化物半导体膜。 绝缘膜形成在第一绝缘膜和第三氧化物半导体膜上。 抛光绝缘膜的表面以暴露第三氧化物半导体膜的表面，使得形成与第三氧化物半导体膜的至少侧面接触的侧壁绝缘膜。 然后，在侧壁绝缘膜和第三氧化物半导体膜上形成源电极和漏电极。 形成栅极绝缘膜和栅电极。