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    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    2.
    发明申请
    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20150008430A1

    公开(公告)日：2015-01-08

    申请号：US14492559

    申请日：2014-09-22

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei YAMAZAKI ,  Teruyuki FUJII ,  Sho NAGAMATSU

    IPC: H01L29/786 ,  H01L23/00 ,  H01L29/36

    CPC classification number: H01L29/7869 ,  H01L23/564 ,  H01L29/36 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78621 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A base insulating film is formed over a substrate. A first oxide semiconductor film is formed over the base insulating film, and then first heat treatment is performed to form a second oxide semiconductor film. Then, selective etching is performed to form a third oxide semiconductor film. An insulating film is formed over the first insulating film and the third oxide semiconductor film. A surface of the insulating film is polished to expose a surface of the third oxide semiconductor film, so that a sidewall insulating film is formed in contact with at least a side surface of the third oxide semiconductor film. Then, a source electrode and a drain electrode are formed over the sidewall insulating film and the third oxide semiconductor film. A gate insulating film and a gate electrode are formed.

    Abstract translation: 在基板上形成基极绝缘膜。 在基底绝缘膜上形成第一氧化物半导体膜，然后进行第一热处理以形成第二氧化物半导体膜。 然后，进行选择性蚀刻以形成第三氧化物半导体膜。 绝缘膜形成在第一绝缘膜和第三氧化物半导体膜上。 抛光绝缘膜的表面以暴露第三氧化物半导体膜的表面，使得形成与第三氧化物半导体膜的至少侧面接触的侧壁绝缘膜。 然后，在侧壁绝缘膜和第三氧化物半导体膜上形成源电极和漏电极。 形成栅极绝缘膜和栅电极。

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    6.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
    制造半导体器件的方法

    公开(公告)号：US20160035865A1

    公开(公告)日：2016-02-04

    申请号：US14804932

    申请日：2015-07-21

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Sho NAGAMATSU ,  Tomoaki MORIWAKA

    IPC: H01L29/66 ,  H01L21/4763 ,  H01L27/12 ,  H01L29/786 ,  H01L21/02

    CPC classification number: H01L29/66969 ,  H01L21/02074 ,  H01L21/02178 ,  H01L21/022 ,  H01L21/02266 ,  H01L21/0228 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/1225 ,  H01L29/78603 ,  H01L29/7869 ,  H01L29/78696

    Abstract: A first conductor is formed over a substrate. A first insulator is formed over the first conductor. A second insulator including aluminum oxide is formed over the first insulator. A third insulator is formed in contact with a top surface of the second insulator. A first opening portion reaching the first conductor is provided in the first to third insulators. A second conductor is formed over the third insulator and in the first opening portion. A third conductor is formed in the first opening portion by removing part of the second conductor over the third insulator so that a surface of the third conductor is parallel to a bottom surface of the substrate. A first transistor including an oxide semiconductor is formed over the third insulator.

    Abstract translation: 第一导体形成在衬底上。 在第一导体上形成第一绝缘体。 在第一绝缘体上形成包括氧化铝的第二绝缘体。 第三绝缘体形成为与第二绝缘体的顶表面接触。 到达第一导体的第一开口部分设置在第一至第三绝缘体中。 第二导体形成在第三绝缘体上并且在第一开口部分中。 第三导体通过在第三绝缘体上除去第二导体的一部分而形成在第一开口部分中，使得第三导体的表面平行于衬底的底表面。 包括氧化物半导体的第一晶体管形成在第三绝缘体上。

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    7.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20150221754A1

    公开(公告)日：2015-08-06

    申请号：US14688199

    申请日：2015-04-16

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Suguru HONDO ,  Akihisa SHIMOMURA ,  Masaki KOYAMA ,  Motomu KURATA ,  Kazuya HANAOKA ,  Sho NAGAMATSU ,  Kosei NEI ,  Toru HASEGAWA

    IPC: H01L29/66 ,  H01L21/46

    CPC classification number: H01L29/66969 ,  H01L21/46 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

    Abstract: A transistor including an oxide semiconductor film, which has stable electric characteristics is provided. A transistor including an oxide semiconductor film, which has excellent on-state characteristics is also provided. A semiconductor device in which an oxide semiconductor film having low resistance is formed and the resistance of a channel region of the oxide semiconductor film is increased. Note that an oxide semiconductor film is subjected to a process for reducing the resistance to have low resistance. The process for reducing the resistance of the oxide semiconductor film may be a laser process or heat treatment at a temperature higher than or equal to 450° C. and lower than or equal to 740° C., for example. A process for increasing the resistance of the channel region of the oxide semiconductor film having low resistance may be performed by plasma oxidation or implantation of oxygen ions, for example.

    Abstract translation: 提供具有稳定电特性的包括氧化物半导体膜的晶体管。 还提供了具有优异的导通状态特性的包括氧化物半导体膜的晶体管。 其中形成具有低电阻的氧化物半导体膜并且氧化物半导体膜的沟道区的电阻增加的半导体器件。 注意，氧化物半导体膜经受用于降低电阻以降低电阻的工艺。 用于降低氧化物半导体膜的电阻的方法可以是例如在高于或等于450℃且低于或等于740℃的温度下的激光处理或热处理。 例如，可以通过等离子体氧化或氧离子的注入来提高具有低电阻的氧化物半导体膜的沟道区域的电阻的方法。

    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
    8.
    发明申请
    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE 审中-公开
    制造半导体器件和半导体器件的方法

    公开(公告)号：US20140349444A1

    公开(公告)日：2014-11-27

    申请号：US14454071

    申请日：2014-08-07

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Toshihiko SAITO ,  Atsuo ISOBE ,  Kazuya HANAOKA ,  Sho NAGAMATSU

    IPC: H01L29/66 ,  H01L21/465 ,  H01L21/463 ,  H01L21/02 ,  H01L21/44

    CPC classification number: H01L29/66969 ,  H01L21/02565 ,  H01L21/44 ,  H01L21/463 ,  H01L21/465 ,  H01L27/1225 ,  H01L27/14632 ,  H01L27/14687 ,  H01L29/04 ,  H01L29/78 ,  H01L29/7869

    Abstract: A minute transistor and the method of manufacturing the minute transistor. A source electrode layer and a drain electrode layer are each formed in a corresponding opening formed in an insulating layer covering a semiconductor layer. The opening of the source electrode layer and the opening of the drain electrode layer are formed separately in two distinct steps. The source electrode layer and the drain electrode layer are formed by depositing a conductive layer over the insulating layer and in the openings, and subsequently removing the part located over the insulating layer by polishing. This manufacturing method allows for the source electrode later and the drain electrode layer to be formed close to each other and close to a channel forming region of the semiconductor layer. Such a structure leads to a transistor having high electrical characteristics and a high manufacturing yield even in the case of a minute structure.

    Abstract translation: 一分钟晶体管和微晶体管的制造方法。 源极电极层和漏极电极层各自形成在形成在覆盖半导体层的绝缘层中的对应的开口中。 源电极层的开口和漏电极层的开口分开形成两个不同的步骤。 源极电极层和漏电极层通过在绝缘层上和开口中沉积导电层而形成，然后通过抛光去除位于绝缘层之上的部分。 该制造方法允许稍后的源极电极和漏极电极层彼此靠近并且靠近半导体层的沟道形成区域。 这种结构导致即使在微小结构的情况下也具有高电特性和高制造成品率的晶体管。

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