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    PIXEL STRUCTURE, ARRAY SUBSTRATE, DISPLAY PANEL, DISPLAY DEVICE, AND DRIVING METHOD OF DISPLAY DEVICE
    5.
    发明申请
    PIXEL STRUCTURE, ARRAY SUBSTRATE, DISPLAY PANEL, DISPLAY DEVICE, AND DRIVING METHOD OF DISPLAY DEVICE 有权
    像素结构，阵列基板，显示面板，显示设备以及显示设备的驱动方法

    公开(公告)号：US20160104447A1

    公开(公告)日：2016-04-14

    申请号：US14743941

    申请日：2015-06-18

    Applicant: Shanghai AVIC OPTO Electronics Co., Ltd. ,  Tianma Micro-Electronics Co., Ltd.

    Inventor： Yao Lin ,  Zhaokeng Cao ,  Dandan Qin ,  Shoufu Jian ,  Tinghai Wang ,  Yinghua Mo

    IPC: G09G3/36

    CPC classification number: G09G3/3648 ,  G09G3/3614

    Abstract: A pixel structure, array substrate, display panel, display device, and driving method of the display device are provided. The pixel structure includes a plurality of data lines and a plurality of scan lines; a plurality of pixel units formed by intersecting the data lines with the scan lines. Each of the pixel units corresponds to one of the data lines and one of the scan lines; and the pixel unit includes a pixel electrode and a thin film transistor therein. In one of two adjacent columns of pixel units, a pixel electrode of each pixel unit is electrically connected with a thin film transistor of the pixel unit; and in the other one of the two adjacent columns of pixel units, a pixel electrode of each pixel unit in a row is electrically connected with a thin film transistor of a pixel unit in an adjacent row.

    Abstract translation: 提供了像素结构，阵列基板，显示面板，显示装置以及显示装置的驱动方法。 像素结构包括多条数据线和多条扫描线; 通过将数据线与扫描线交叉而形成的多个像素单元。 每个像素单元对应于数据线之一和扫描线之一; 并且像素单元包括像素电极和薄膜晶体管。 在像素单元的两个相邻列之一中，每个像素单元的像素电极与像素单元的薄膜晶体管电连接; 并且在两个相邻列的像素单元中的另一个中，一行中的每个像素单元的像素电极与相邻行中的像素单元的薄膜晶体管电连接。

    Shift register, gate driving circuit, display device, and driving method thereof
    6.
    发明授权
    Shift register, gate driving circuit, display device, and driving method thereof 有权

    公开(公告)号：US10586604B1

    公开(公告)日：2020-03-10

    申请号：US16230484

    申请日：2018-12-21

    Applicant: Shanghai AVIC OPTO Electronics Co.,Ltd.

    Inventor： Rili Fei ,  Zhiqiang Xia ,  Dandan Qin ,  Dongliang Dun ,  Shoufu Jian ,  Tinghai Wang ,  Ying Xie ,  Houxun Xia

    IPC: G11C19/28 ,  G09G3/20 ,  G06F3/041

    Abstract: A shift register includes a forward/backward scan-control module, configured to transmit a signal of a forward-scan-signal terminal or a signal of a backward-scan-signal terminal to a first node; an interlock module, configured to transmit a signal of a first voltage terminal to a second node, and transmit a signal of a second voltage terminal to the first node; a pull-down module, configured to transmit the signal of the first voltage terminal to a gate-signal output terminal; an output module, configured to transmit a signal of a second clock-signal terminal to the gate-signal output terminal; and a reset module, configured to transmit the signal of the second voltage terminal to the first node, and transmit the signal of the first voltage terminal to the gate-signal output terminal. The disclosed shift register can prevent leakage of the first node, and thus improve the quality and the performance of the shift register.

    PIXEL STRUCTURE, MANUFACTURING METHOD OF PIXEL STRUCTURE, ARRAY SUBSTRATE, AND DISPLAY PANEL
    7.
    发明申请
    PIXEL STRUCTURE, MANUFACTURING METHOD OF PIXEL STRUCTURE, ARRAY SUBSTRATE, AND DISPLAY PANEL 有权
    像素结构，像素结构的制造方法，阵列基板和显示面板

    公开(公告)号：US20160155756A1

    公开(公告)日：2016-06-02

    申请号：US15016034

    申请日：2016-02-04

    Applicant: Shanghai AVIC OPTO Electronics Co., Ltd. ,  Tianma Micro-Electronics Co., Ltd.

    Inventor： Yao Lin ,  Dandan Qin ,  Zhaokeng Cao ,  Yinghua Mo

    IPC: H01L27/12

    CPC classification number: H01L27/124 ,  G02F1/134336 ,  G02F1/134363 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2201/52 ,  H01L27/1259 ,  H01L27/14603 ,  H01L27/326

    Abstract: The disclosure provides a pixel structure, a manufacturing method of a pixel structure, an array substrate, a display panel, and a display device. The pixel structure includes a plurality of data lines and a plurality of scan lines, and a plurality of pixel units formed by intersecting the plurality of data lines with the plurality of scan lines. A pixel unit corresponds to one of the plurality of data lines and one of the plurality of scan lines. The pixel unit includes a pixel electrode and a TFT. The pixel electrode of the pixel unit in a row is electrically connected to a TFT of a pixel unit in a preceding adjacent row of the pixel electrode of the pixel unit.

    Abstract translation: 本公开提供了像素结构，像素结构的制造方法，阵列基板，显示面板和显示装置。 像素结构包括多条数据线和多条扫描线，以及通过将多条数据线与多条扫描线相交而形成的多个像素单元。 像素单元对应于多条数据线中的一条和多条扫描线中的一条。 像素单元包括像素电极和TFT。 像素单元的像素电极与像素单元的像素单元的前一相邻行中的像素单元的TFT电连接。

    DISPLAY PANEL AND DISPLAY DEVICE
    8.
    发明申请
    DISPLAY PANEL AND DISPLAY DEVICE 审中-公开

    公开(公告)号：US20180373104A1

    公开(公告)日：2018-12-27

    申请号：US16106008

    申请日：2018-08-21

    Applicant: Shanghai AVIC OPTO Electronics Co.,Ltd.

    Inventor： Dandan Qin ,  Xiaodong Luo ,  Zhaokeng Cao ,  Boping Shen ,  Xiufeng Zhou

    IPC: G02F1/1362 ,  G06F3/044 ,  G06F3/041 ,  G02F1/1333 ,  G02F1/1343 ,  G02F1/1368

    Abstract: The present disclosure provides a display panel and a display device, which can lower a probability of metal being remained in the drain hole of the planarization layer and thus improve the related display defects. The display panel includes a plurality of sub-pixels arranged in an array. A region between any two adjacent columns of sub-pixels is a column spacing region. The column spacing region includes a first column spacing region with signal touch line and a second column spacing region. In each column of sub-pixels adjacent to the first column spacing region, adjacent ends of any two adjacent sub-pixels close to the first column spacing region are aligned in a sub-pixel column direction. In each column of sub-pixels adjacent to the second column spacing region, adjacent ends of at least two adjacent sub-pixels close to the second column spacing region are misaligned in the sub-pixel column direction.

    PIXEL STRUCTURE AND MANUFACTURING METHOD THEREFOR, ARRAY STRUCTURE, DISPLAY PANEL AND DISPLAY DEVICE
    9.
    发明申请
    PIXEL STRUCTURE AND MANUFACTURING METHOD THEREFOR, ARRAY STRUCTURE, DISPLAY PANEL AND DISPLAY DEVICE 有权
    像素结构及其制造方法，阵列结构，显示面板和显示设备

    公开(公告)号：US20160103350A1

    公开(公告)日：2016-04-14

    申请号：US14742599

    申请日：2015-06-17

    Applicant: Shanghai AVIC OPTO Electronics Co., Ltd. ,  Tianma Micro-Electronics Co., Ltd.

    Inventor： Tinghai Wang ,  Zhaokeng Cao ,  Yao Lin ,  Dandan Qin

    IPC: G02F1/1368 ,  G02F1/1343 ,  H01L27/12 ,  G02F1/1362

    CPC classification number: G02F1/1368 ,  G02F1/133707 ,  G02F1/134363 ,  G02F1/136286 ,  H01L27/124 ,  H01L27/1259

    Abstract: A pixel structure and manufacturing method therefor, an array structure, a display panel and a display device. And the pixel structure includes data lines; scan lines; pixel units formed by intersecting the data lines with the scan lines, where each pixel unit corresponds to one data line and one scan line; a TFT and a pixel electrode disposed in each of pixel units, where the pixel electrode includes slits, at least one of which includes at least one corner area at an end thereof; where the pixel electrode in a row is electrically connected to a TFT in a pixel unit, the pixel unit is disposed in the same row as and adjacently at one side of the pixel electrode, and at least one corner area of the pixel electrode extends toward the TFT electrically connected to the pixel electrode.

    Abstract translation: 像素结构及其制造方法，阵列结构，显示面板和显示装置。 并且像素结构包括数据线; 扫描线; 通过将数据线与扫描线相交形成的像素单元，其中每个像素单元对应于一条数据线和一条扫描线; 设置在每个像素单元中的TFT和像素电极，其中像素电极包括狭缝，其中至少一个在其末端包括至少一个拐角区域; 其中一行中的像素电极与像素单元中的TFT电连接，像素单元设置在与像素电极的一侧相同且相邻的像素单元中，并且像素电极的至少一个角区域向着 TFT连接到像素电极。

    Display panel and display apparatus
    10.
    发明授权
    Display panel and display apparatus 有权

    公开(公告)号：US11048132B2

    公开(公告)日：2021-06-29

    申请号：US16942786

    申请日：2020-07-30

    Applicant: Shanghai AVIC OPTO Electronics Co., Ltd.

    Inventor： Shoufu Jian ,  Feng Qin ,  Dandan Qin ,  Benshun Zhong

    IPC: G02F1/1362 ,  G02F1/1345 ,  G02F1/1368

    Abstract: Provided are a display panel and a display apparatus. The display panel has a bonding region where a chip is bonded, and a fan-out region where fan-out leads is arranged. Bonding pads in the bonding region include a first pad array and a second pad array, the first pad array being at a side of the second pad array close to the display region. The first pad array includes first pads arranged in at least two rows. The first pad array includes at least one inclined section including at least three first pads that are arranged sequentially and obliquely away from the display region. Such an arrangement allows at least a portion of the fan-out leads to be displaced into the bonding region, to increase the area for arranging the fan-out leads. Therefore, the lower border of the display panel is narrowed.

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