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公开(公告)号：US10393808B2
公开(公告)日：2019-08-27
申请号：US16014183
申请日：2018-06-21
发明人： Yang Chen , Yongqi Zhou
IPC分类号： H04B14/04 , G01R31/3181 , G01R31/317
摘要： An eye pattern generator for generating an eye pattern of an input signal is provided. The eye pattern generator includes first and second comparators and a control circuit. The first comparator receives the input signal, a clock signal, and a first voltage and compares the input signal with the first voltage according to the clock signal to generate a first comparison signal. The second comparator receives the input signal, the clock signal, and a second voltage lower than the first voltage and compares the input signal with the second voltage according to the clock signal to generate a second comparison signal. The control circuit changes at least one of a level of the first voltage and a level of the second voltage according to the first and second comparison signals to form a region boundary between an open-eye region and a closed-eye region of the eye pattern.
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公开(公告)号：US11742842B2
公开(公告)日：2023-08-29
申请号：US17823996
申请日：2022-09-01
发明人： Yongqi Zhou , Yang Chen
摘要： A multi-phase clock generator is provided in the application. The multi-phase clock generator includes a first oscillator circuit and a second oscillator circuit. The first oscillator circuit includes a plurality of first delay circuits. The first oscillator circuit receives the first number of multi-phase input clock signals and outputs the second number of first output clock signals, wherein the second number is larger than the first number. The second oscillator circuit is coupled to the first oscillator circuit. The second oscillator circuit includes a plurality of second delay circuits. The second oscillator circuit receives the second number of first output clock signals and outputs the second number of second output clock signals. The number of second delay circuits is less than the number of first delay circuits.
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公开(公告)号：US11215953B1
公开(公告)日：2022-01-04
申请号：US17079799
申请日：2020-10-26
发明人： Yongqi Zhou , Xiaoguang Wang
摘要： A time-to-digital convertor comprises a phase frequency detector, a first conversion module, a gated ring oscillator and a counting module. The phase frequency detector outputs a first detection signal and a second detection signal according to a first clock signal and a second clock signal. The first conversion module receives the first detection signal and the second detection signal to generate a first control signal and a second control signal. The gated ring oscillator receives the first and second control signals and outputs a plurality of clock signals according to the pulse width difference between the first and second control signals. The counting module counts the plurality of clock signals to generate the phase difference between the first and second clock signals.
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公开(公告)号：US11128255B1
公开(公告)日：2021-09-21
申请号：US17085041
申请日：2020-10-30
发明人： Yongqi Zhou , Xiaoguang Wang
摘要： An oscillator circuit comprises differential amplifiers connected in series and an auxiliary start circuit. A first output terminal and a second output terminal of each differential amplifier are respectively coupled to a first input terminal and a second input terminal of the next differential amplifier. Said first output terminal of the last differential amplifier is coupled to said second input terminal of the first differential amplifier. Said second output terminal of said last differential amplifier is coupled to said first input terminal of said first differential amplifiers. Said auxiliary start circuit generates a first disturbance signal and a second disturbance signal to said first input terminal and said second input terminal of a second differential amplifier according to said signal state of said first input terminal of a first differential amplifier. Said first different amplifier is one of said differential amplifiers. Said second differential amplifier is another differential amplifier.
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