公开(公告)号：US08956926B2

公开(公告)日：2015-02-17

申请号：US13376836

申请日：2011-06-13

申请人： Shengdong Zhang ,  Xin He ,  Yi Wang ,  Dedong Han ,  Jeng Han

发明人： Shengdong Zhang ,  Xin He ,  Yi Wang ,  Dedong Han ,  Ruqi Han

IPC分类号： H01L21/00 ,  H01L29/66 ,  H01L29/49 ,  H01L29/786

CPC分类号： H01L29/66742 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

摘要： Disclosed is a method for manufacturing a self-aligned metal oxide thin film transistor. According to the present invention, a metal oxide semiconductor layer having a high carrier concentration is formed, and then a channel region which is self-aligned with a gate electrode is oxidized by a plasma having oxidbillity so that the channel region has a low carrier concentration and the source and drain regions have high carrier concentrations while the resulting transistor has a self-aligned structure. In addition, the threshold voltage of the transistor is controlled by the conditions under which the channel region of the transistor is subsequently oxidized by plasma having oxidbillity at a low temperature. Therefore, the controllability of the characteristics of the transistor is improved significantly, and the manufacturing process is simplified.

摘要翻译： 公开了一种制造自对准金属氧化物薄膜晶体管的方法。 根据本发明，形成具有高载流子浓度的金属氧化物半导体层，然后与栅电极自对准的沟道区域被具有氧化性的等离子体氧化，使得沟道区域具有低载流子浓度 并且源极和漏极区域具有高的载流子浓度，而所得的晶体管具有自对准结构。 此外，晶体管的阈值电压由下述条件控制，在该条件下，晶体管的沟道区域随后在低温下具有氧化性的等离子体氧化。 因此，晶体管的特性的可控性显着提高，制造工艺简化。

公开(公告)号：US20140011329A1

公开(公告)日：2014-01-09

申请号：US13376836

申请日：2011-06-13

申请人： Shengdong Zhang ,  Xin He ,  Yi Wang ,  Dedong Han ,  Ruqi Han

发明人： Shengdong Zhang ,  Xin He ,  Yi Wang ,  Dedong Han ,  Ruqi Han

IPC分类号： H01L29/66

CPC分类号： H01L29/66742 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

摘要： Disclosed is a method for manufacturing a self-aligned metal oxide thin film transistor. According to the present invention, a metal oxide semiconductor layer having a high carrier concentration is formed, and then a channel region which is self-aligned with a gate electrode is oxidized by a plasma having oxidbillity so that the channel region has a low carrier concentration and the source and drain regions have high carrier concentrations while the resulting transistor has a self-aligned structure. In addition, the threshold voltage of the transistor is controlled by the conditions under which the channel region of the transistor is subsequently oxidized by plasma having oxidbillity at a low temperature. Therefore, the controllability of the characteristics of the transistor is improved significantly, and the manufacturing process is simplified.

摘要翻译： 公开了一种制造自对准金属氧化物薄膜晶体管的方法。 根据本发明，形成具有高载流子浓度的金属氧化物半导体层，然后与栅电极自对准的沟道区域被具有氧化性的等离子体氧化，使得沟道区域具有低载流子浓度 并且源极和漏极区域具有高的载流子浓度，而所得的晶体管具有自对准结构。 此外，晶体管的阈值电压由下述条件控制，在该条件下，晶体管的沟道区域随后在低温下具有氧化性的等离子体氧化。 因此，晶体管的特性的可控性显着提高，制造工艺简化。

公开(公告)号：US20130122649A1

公开(公告)日：2013-05-16

申请号：US13376833

申请日：2011-06-13

申请人： Shengdong Zhang ,  Xin He ,  Yi Wang ,  Dedong Han ,  Ruqi Han

发明人： Shengdong Zhang ,  Xin He ,  Yi Wang ,  Dedong Han ,  Ruqi Han

IPC分类号： H01L29/66

CPC分类号： H01L29/66742 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

摘要： Disclosed is a method for manufacturing a metal oxide thin film transistor. According to the method, an active layer having a high carrier concentration is formed, and then a channel region is oxidized by plasma having oxidbillity so that the channel region has a low carrier concentration while a source region and a drain region have high carrier concentrations. In addition, the threshold voltage of the transistor is controlled by the conditions under which the channel region of the transistor is subsequently oxidized by plasma having oxidbillity at a low temperature. Therefore, the controllability of the characteristics of the transistor is improved significantly, and the manufacturing process is simplified.

摘要翻译： 公开了一种金属氧化物薄膜晶体管的制造方法。 根据该方法，形成具有高载流子浓度的有源层，然后通过具有氧化性的等离子体使沟道区域氧化，使得沟道区域具有低的载流子浓度，而源区和漏区具有高的载流子浓度。 此外，晶体管的阈值电压由下述条件控制，在该条件下，晶体管的沟道区域随后在低温下具有氧化性的等离子体氧化。 因此，晶体管的特性的可控性显着提高，制造工艺简化。

公开(公告)号：US20130309808A1

公开(公告)日：2013-11-21

申请号：US13376834

申请日：2011-06-10

申请人： Shengdong Zhang ,  Xin He ,  Longyan Wang

发明人： Shengdong Zhang ,  Xin He ,  Longyan Wang

IPC分类号： H01L29/66

CPC分类号： H01L29/66742 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869

摘要： Designs and fabrication of dual-gate thin film transistors are provided. An active region and a top gate electrode of the transistor can be made of a transparent thin film material. A photoresist can be coated onto a surface of the transparent conductive thin film for forming the top gate electrode. Light is from the bottom of the substrate during exposure. After the development, a photoresist pattern aligned with the bottom gate electrode is formed on the surface of the conductive thin film. The top gate electrode aligned with the bottom gate electrode is formed by etching the conductive thin film. The bottom gate electrode can be used as a mask, which may save the cost for manufacturing the transistor and improve the accuracy of alignment between the top gate electrode and the bottom gate electrode and the performance of the dual-gate thin film transistor.

摘要翻译： 提供双栅极薄膜晶体管的设计和制造。 晶体管的有源区和顶栅电极可以由透明薄膜材料制成。 可以将光致抗蚀剂涂覆在透明导电薄膜的表面上，以形成顶栅电极。 光在曝光期间来自底物的底部。 在显影之后，在导电薄膜的表面上形成与底栅电极对准的光致抗蚀剂图案。 通过蚀刻导电薄膜来形成与底栅电极对准的顶栅电极。 底栅电极可以用作掩模，这可以节省制造晶体管的成本，并提高顶栅电极和底栅电极之间的对准精度以及双栅极薄膜晶体管的性能。

公开(公告)号：US09129992B2

公开(公告)日：2015-09-08

申请号：US13376834

申请日：2011-06-13

申请人： Shengdong Zhang ,  Xin He ,  Longyan Wang

发明人： Shengdong Zhang ,  Xin He ,  Longyan Wang

IPC分类号： H01L21/00 ,  H01L29/66 ,  H01L29/786

CPC分类号： H01L29/66742 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869

摘要： Designs and fabrication of dual-gate thin film transistors are provided. An active region and a top gate electrode of the transistor can be made of a transparent thin film material. A photoresist can be coated onto a surface of the transparent conductive thin film for forming the top gate electrode. Light is from the bottom of the substrate during exposure. After the development, a photoresist pattern aligned with the bottom gate electrode is formed on the surface of the conductive thin film. The top gate electrode aligned with the bottom gate electrode is formed by etching the conductive thin film. The bottom gate electrode can be used as a mask, which may save the cost for manufacturing the transistor and improve the accuracy of alignment between the top gate electrode and the bottom gate electrode and the performance of the dual-gate thin film transistor.

摘要翻译： 提供双栅极薄膜晶体管的设计和制造。 晶体管的有源区和顶栅电极可以由透明薄膜材料制成。 可以将光致抗蚀剂涂覆在透明导电薄膜的表面上，以形成顶栅电极。 光在曝光期间来自底物的底部。 在显影之后，在导电薄膜的表面上形成与底栅电极对准的光致抗蚀剂图案。 通过蚀刻导电薄膜来形成与底栅电极对准的顶栅电极。 底栅电极可以用作掩模，这可以节省制造晶体管的成本，并提高顶栅电极和底栅电极之间的对准精度以及双栅极薄膜晶体管的性能。

公开(公告)号：US08571134B2

公开(公告)日：2013-10-29

申请号：US13062330

申请日：2009-08-24

申请人： Nenad Pavlovic ,  Manel Collados ,  Xin He ,  Jan Van Sinderen

发明人： Nenad Pavlovic ,  Manel Collados ,  Xin He ,  Jan Van Sinderen

IPC分类号： H04L27/00

CPC分类号： H04L27/361 ,  H04L27/2627 ,  H04L2027/0018 ,  H04L2027/0067

摘要： The present application relates to at least one digitally controlled oscillator and a data modulation device. More particularly, the digital polar transmitter comprises at least one digitally controlled oscillator configured to generate at least one frequency. The digital polar transmitter comprises a data modulation device, wherein the data modulation device comprises at least one data input terminal, at least one output terminal, and at least one frequency input terminal, wherein the output terminal is connected to the digitally controlled oscillator. The digital polar transmitter comprises a phase measuring device configured to measure phase information from the output signal of the data modulation device for every frequency sample. The digital polar transmitter comprises a phase error detecting device configured to detect a phase error at least depending on the measured phase information, wherein the phase error detecting device is configured to apply the detected phase error to the output signal of the data modulation device.

摘要翻译： 本申请涉及至少一个数字控制振荡器和数据调制装置。 更具体地，数字极化发射器包括被配置为产生至少一个频率的至少一个数字控制振荡器。 数字极性发射机包括数据调制装置，其中数据调制装置包括至少一个数据输入端，至少一个输出端和至少一个频率输入端，其中输出端与数控振荡器相连。 数字极性发射机包括相位测量装置，其被配置为针对每个频率样本从数据调制装置的输出信号测量相位信息。 数字极性发射机包括相位误差检测装置，其被配置为至少根据所测量的相位信息检测相位误差，其中相位误差检测装置被配置为将检测到的相位误差应用于数据调制装置的输出信号。

公开(公告)号：US08392399B2

公开(公告)日：2013-03-05

申请号：US12883420

申请日：2010-09-16

申请人： Xin He

发明人： Xin He

IPC分类号： G06F7/00 ,  G06F17/30

CPC分类号： G06F17/30439 ,  G06F17/30545

摘要： Querying data stores in a federation of data stores. A first search filter is accessed. The first search filter is constructed with one or more nested logical AND, OR, or NOT operands. The first search filter is normalized to a normalized search filter that is logically equivalent to the first search filter. The normalized search filter includes 3 or 4 levels. All first level operands are logically ORed. All second level operands are logically ANDed. All third level operands are at least one of parameters or logical NOTs. Any fourth level operands are parameters. The normalized search filter is used to search a plurality of data stores in a federation of data stores for information by searching different data stores for at least two or more of the top level operands.

摘要翻译： 在数据存储联合中查询数据存储。 访问第一个搜索过滤器。 第一个搜索过滤器由一个或多个嵌套的逻辑AND，OR或NOT操作数构成。 第一个搜索过滤器被归一化为逻辑上等同于第一个搜索过滤器的归一化搜索过滤器。 归一化搜索过滤器包括3或4个级别。 所有第一级操作数均为逻辑或运算。 所有二级操作数都是逻辑“和”。 所有第三级操作数都是参数或逻辑NOT中的至少一个。 任何第四级操作数都是参数。 归一化搜索过滤器用于通过搜索不同数据存储中的至少两个或更多个顶级操作数来搜索用于信息的数据存储的联合中的多个数据存储。

公开(公告)号：US08237503B2

公开(公告)日：2012-08-07

申请号：US12921572

申请日：2009-03-09

申请人： Xin He ,  Manel Collados Asensio ,  Nenad Pavlovic ,  Jan Van Sinderen

发明人： Xin He ,  Manel Collados Asensio ,  Nenad Pavlovic ,  Jan Van Sinderen

IPC分类号： H03F3/26

CPC分类号： H04B1/0483

摘要： An output stage (1) for a digital RF transmitter is provided. The output stage comprises: an input adapted to receive an input signal (RFin, b7-b0) to be transmitted; a plurality N of power amplification sections (S1, S2, S3, S4); and an output (A, B) providing an output voltage signal. Each of the N power amplification sections (S1, S2, S3, S4) is arranged to receive the input signal (RFin, b7-b0) and comprises a transformer (T1, T2, T3, T4) adapted to provide a respective output signal. Each transformer comprises a primary stage and a secondary stage; the secondary stages of the transformers (T1, T2, T3, T4) of the N power amplification sections (S1, S2, S3, S4) are combined such that a combined output voltage signal of the output stage is provided. The N power amplification sections (S1, S2, S3, S4) are adapted such that the input signal (RFin, b7-b0) is latched by clock signals (clock1, clock2, clock3, clock4) comprising different phases.

摘要翻译： 提供了一种用于数字RF发射器的输出级（1）。 输出级包括：适于接收要发送的输入信号（RFin，b7-b0）的输入; 多个N个功率放大部分（S1，S2，S3，S4）; 以及提供输出电压信号的输出（A，B）。 N个功率放大部分（S1，S2，S3，S4）中的每一个被布置成接收输入信号（RFin，b7-b0），并且包括适于提供相应输出信号的变压器（T1，T2，T3，T4） 。 每个变压器包括初级和次级级; N个功率放大部（S1，S2，S3，S4）的变压器（T1，T2，T3，T4）的次级组合，从而提供输出级的组合输出电压信号。 N个功率放大部分（S1，S2，S3，S4）被适配成使得输入信号（RFin，b7-b0）被包括不同相位的时钟信号（clock1，clock2，clock3，clock4）锁存。

公开(公告)号：US20120072414A1

公开(公告)日：2012-03-22

申请号：US12883420

申请日：2010-09-16

申请人： Xin He

发明人： Xin He

IPC分类号： G06F17/30

CPC分类号： G06F17/30439 ,  G06F17/30545

摘要： Querying data stores in a federation of data stores. A first search filter is accessed. The first search filter is constructed with one or more nested logical AND, OR, or NOT operands. The first search filter is normalized to a normalized search filter that is logically equivalent to the first search filter. The normalized search filter includes 3 or 4 levels. All first level operands are logically ORed. All second level operands are logically ANDed. All third level operands are at least one of parameters or logical NOTs. Any fourth level operands are parameters. The normalized search filter is used to search a plurality of data stores in a federation of data stores for information by searching different data stores for at least two or more of the top level operands.

摘要翻译： 在数据存储联合中查询数据存储。 访问第一个搜索过滤器。 第一个搜索过滤器由一个或多个嵌套的逻辑AND，OR或NOT操作数构成。 第一个搜索过滤器被归一化为逻辑上等同于第一个搜索过滤器的归一化搜索过滤器。 归一化搜索过滤器包括3或4个级别。 所有第一级操作数均为逻辑或运算。 所有二级操作数都是逻辑“和”。 所有第三级操作数都是参数或逻辑NOT中的至少一个。 任何第四级操作数都是参数。 归一化搜索过滤器用于通过搜索不同数据存储中的至少两个或更多个顶级操作数来搜索用于信息的数据存储的联合中的多个数据存储。

公开(公告)号：US20090270116A1

公开(公告)日：2009-10-29

申请号：US12109689

申请日：2008-04-25

申请人： Qingfeng Bao ,  Ke Song Han ,  Xin He

发明人： Qingfeng Bao ,  Ke Song Han ,  Xin He

IPC分类号： H04Q7/20

CPC分类号： H04L51/38

摘要： An electronic device and a method for replying to a received text message received at the electronic device. The method comprises composing a reply text message on a common display screen of the device whist concurrently displaying, on the common display screen, a body of text contained in the received text message. The method performs transmitting the reply text message without the body of text contained in the received text message and automatically removing, in response to the transmitting, the reply text message from the common display screen.

摘要翻译： 一种用于回复在电子设备处接收的接收到的文本消息的电子设备和方法。 所述方法包括在所述设备的公共显示屏幕上组成回复文本消息，所述共享显示屏幕在公共显示屏幕上同时显示包含在所接收的文本消息中的文本主体。 该方法执行发送回复文本消息而没有收到的文本消息中包含的文本主体，并且响应于来自公共显示屏幕的回复文本消息自动地去除。