公开(公告)号：US06576509B1

公开(公告)日：2003-06-10

申请号：US09639305

申请日：2000-08-16

申请人： Shigeya Toyokawa ,  Takashi Hashimoto ,  Kenichi Kuroda ,  Shoji Yoshida ,  Toshiyuki Iwaki ,  Masamichi Matsuoka

发明人： Shigeya Toyokawa ,  Takashi Hashimoto ,  Kenichi Kuroda ,  Shoji Yoshida ,  Toshiyuki Iwaki ,  Masamichi Matsuoka

IPC分类号： H01L218242

CPC分类号： H01L27/10888 ,  H01L21/76877 ,  H01L21/76897 ,  H01L27/10814 ,  H01L27/10894 ,  H01L27/10897 ,  H01L28/91

摘要： In forming a plug 21 of a polycrystalline silicon film in a contact hole 19 to which a bit line BL is connected, the upper surface of the plug 21 is retracted downward from the upper edge of the contact hole 19, and a plug 22 of a laminate of a TiN film 26 and a W film 27 is formed on the plug 21. Then, the W film deposited on the contact hole 19 is patterned to form a bit line BL having a width narrower than the diameter of the contact hole 19. Here, the W film 27 constituting part of the plug 22 in the contact hole 19 is etched, but the TiN film 26 constituting another part of the plug 22 is not almost etched.

摘要翻译： 在连接有位线BL的接触孔19中形成多晶硅膜的插头21时，插头21的上表面从接触孔19的上边缘向下缩回，并且插头22 在插塞21上形成TiN膜26和W膜27的层压体。然后，将沉积在接触孔19上的W膜图案化，形成宽度比接触孔19的直径窄的位线BL。 这里，构成接触孔19中的插头22的一部分的W膜27被蚀刻，但构成插头22的另一部分的TiN膜26几乎不被蚀刻。