公开(公告)号：US5760634A

公开(公告)日：1998-06-02

申请号：US710184

申请日：1996-09-12

Applicant: Shiu-Jin Fu

Inventor： Shiu-Jin Fu

IPC: H03K19/003 ,  H03K19/017 ,  H03K19/0944 ,  H03K17/16 ,  H03K19/0185

CPC classification number: H03K19/00361 ,  H03K19/01721

Abstract: An output buffer device utilizes a PMOS transistor as a first pull-up element and an NMOS transistor as a second pull-up element. An output signal is used to control a feedback circuit. An output signal is switched from a low to high voltage by a trigger voltage. The first pull-up element switches to the second pull-up element to complete the voltage switching from low to high. The device combines the high speed of the first pull-up element and the low noise of the second pull-up element.

Abstract translation: 输出缓冲器件利用PMOS晶体管作为第一上拉元件和NMOS晶体管作为第二上拉元件。 输出信号用于控制反馈电路。 输出信号通过触发电压从低电平切换到高电压。 第一上拉元件切换到第二上拉元件以完成从低到高的电压切换。 该装置结合了第一上拉元件的高速度和第二上拉元件的低噪声。