公开(公告)号：US07136308B2

公开(公告)日：2006-11-14

申请号：US10979345

申请日：2004-11-01

申请人： Shree Kant ,  Kenway Tam ,  Poonacha P. Kongetira ,  Yuan-Jung D Lin ,  Zhen W. Liu ,  Kathirgamar Aingaran

发明人： Shree Kant ,  Kenway Tam ,  Poonacha P. Kongetira ,  Yuan-Jung D Lin ,  Zhen W. Liu ,  Kathirgamar Aingaran

IPC分类号： G11C7/10

CPC分类号： G11C11/419 ,  G11C7/10 ,  G11C7/24

摘要： A memory system includes an active storage circuit and at least one base storage circuit. The at least one base storage circuit is coupled to the active storage circuit though at least one pass gate, at least one driver and a bit line. The at least one pass gate and the at least one driver have a device size substantially similar to a device size of each one of the devices in the active storage circuit and the at least one base storage circuit. A method of swapping data between two storage circuits is also described.

摘要翻译： 存储器系统包括有源存储电路和至少一个基本存储电路。 至少一个基本存储电路通过至少一个传递门，至少一个驱动器和位线耦合到有源存储电路。 所述至少一个传递门和所述至少一个驱动器具有与所述有源存储电路和所述至少一个基本存储电路中的每个器件的器件尺寸基本相似的器件尺寸。 还描述了在两个存储电路之间交换数据的方法。

公开(公告)号：US07417907B1

公开(公告)日：2008-08-26

申请号：US11021497

申请日：2004-12-23

申请人： Zhen W. Liu ,  Kenway Tam

发明人： Zhen W. Liu ,  Kenway Tam

IPC分类号： G11C7/00

CPC分类号： G11C7/08 ,  G11C7/22

摘要： A hardware implemented method for resolving collisions of memory addresses of a memory array is provided. In this hardware implemented method, a read memory address is compared with a write memory address. If the read and write memory addresses match, write data is directed from a data input to a data output, whereby the data input is further configured to input the write data to the memory array. A system and a memory chip for resolving collisions of memory addresses of a memory array are also described.

摘要翻译： 提供了用于解决存储器阵列的存储器地址的冲突的硬件实现的方法。 在该硬件实现方法中，将读取存储器地址与写入存储器地址进行比较。 如果读取和写入存储器地址匹配，则将数据从数据输入引导到数据输出，由此数据输入进一步被配置为将写入数据输入到存储器阵列。 还描述了用于解决存储器阵列的存储器地址的冲突的系统和存储器芯片。