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公开(公告)号：US12015343B2
公开(公告)日：2024-06-18
申请号：US17537815
申请日：2021-11-30
Applicant: Silicon Laboratories Inc.
Inventor： Hatem Osman , Michael D. Mulligan , Mohamed Elkholy
CPC classification number: H02M3/157 , H02M1/0041
Abstract: In one embodiment, a method includes: enabling a pulse pair circuit of an integrated circuit in response to determining that a receiver associated with the integrated circuit is active; identifying that at least one comparator of a multi-output DC-DC converter trips, the DC-DC converter having a plurality of comparators each to compare a regulated voltage output by the DC-DC converter to a corresponding reference voltage; and generating, in the pulse pair circuit, a control pulse pair according to the tripped output, and driving a driver circuit of the DC-DC converter using the control pulse pair.
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公开(公告)号：US20190326816A1
公开(公告)日：2019-10-24
申请号：US15958561
申请日：2018-04-20
Applicant: Silicon Laboratories Inc.
Inventor： Jeffrey L. Sonntag , Michael D. Mulligan , Ion C. Tesu
IPC: H02M3/158
Abstract: An apparatus includes a voltage converter to convert an input voltage to an output voltage. The voltage converter includes a first set of switches operated during a first switching phase. The voltage converter further includes a second set of switches operated during a second switching phase. The duration of the second switching phase is related to the duration of the first switching phase.
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Patent Agency Ranking
公开(公告)号：US10423174B1
公开(公告)日：2019-09-24
申请号：US15959535
申请日：2018-04-23
Applicant: Silicon Laboratories Inc.
Inventor： Jeffrey L. Sonntag , Dazhi Wei , Michael D. Mulligan , Zachary A. Kaufman , Joselyn Torres-Torres
Abstract: A pulse frequency modulated (PFM) voltage converter autonomously switches between buck, buck-boost, and boost modes as a function of the input and output voltages. The voltage converter may also switch autonomously between buck mode and a low drop out (LDO) mode when configured in a system in which the battery voltage is known to always be higher than the output voltage.
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4.发明公开公开(公告)号：US20230387800A1
公开(公告)日：2023-11-30
申请号：US17828993
申请日：2022-05-31
Applicant: Silicon Laboratories Inc.
Inventor： Srikanth Govindarajulu , Hatem M. Osman , Michael D. Mulligan
Abstract: A method for operating a DC-DC converter circuit includes, in response to detecting a startup condition, charging an output capacitance coupled to an output node of the DC-DC converter circuit at a first rate in a first phase of a multi-phase startup mode of operation of the DC-DC converter circuit. The method includes, in response to an indication of an output voltage on the output node approaching an input voltage on an input node of the DC-DC converter circuit, controlling a current through an inductor using an oscillating signal in a second phase of the multi-phase startup mode of operation, thereby adjusting the output voltage to equal a target voltage level. The first rate may be the rate of charging an RC circuit including the output capacitance coupled to the output node.
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5.发明公开公开(公告)号：US20230387801A1
公开(公告)日：2023-11-30
申请号：US17828994
申请日：2022-05-31
Applicant: Silicon Laboratories Inc.
Inventor： Srikanth Govindarajulu , Michael D. Mulligan , Hatem M. Osman
CPC classification number: H02M3/158 , H02M1/36 , H02M1/0032
Abstract: A method for operating a DC-DC converter includes generating an output voltage on an output node of the DC-DC converter based on an input voltage on an input node of the DC-DC converter using a transistor having a bulk terminal and a gate terminal, the output voltage being greater than the input voltage. The method includes coupling the input node to the bulk terminal and the gate terminal in response to the output voltage being less than the input voltage. The method includes coupling the output node to the bulk terminal in response to the output voltage exceeding the input voltage or a predetermined threshold voltage.
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公开(公告)号：US20230170799A1
公开(公告)日：2023-06-01
申请号：US17537815
申请日：2021-11-30
Applicant: Silicon Laboratories Inc.
Inventor： Hatem Osman , Michael D. Mulligan , Mohamed Elkholy
CPC classification number: H02M3/157 , H02M1/0041
Abstract: In one embodiment, a method includes: enabling a pulse pair circuit of an integrated circuit in response to determining that a receiver associated with the integrated circuit is active; identifying that at least one comparator of a multi-output DC-DC converter trips, the DC-DC converter having a plurality of comparators each to compare a regulated voltage output by the DC-DC converter to a corresponding reference voltage; and generating, in the pulse pair circuit, a control pulse pair according to the tripped output, and driving a driver circuit of the DC-DC converter using the control pulse pair.
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公开(公告)号：US10263523B1
公开(公告)日：2019-04-16
申请号：US15879483
申请日：2018-01-25
Applicant: Silicon Laboratories Inc.
Inventor： Jeffrey L. Sonntag , Joselyn Torres-Torres , Michael D. Mulligan
Abstract: A DC-DC converter with a programmable pulse time limit. A charge pulse begins when the output voltage reaches a minimum threshold and terminates in response to a discharge indication, in which charge current flows through an inductive element while the charge pulse is provided. The discharge indication is provided to initiate a discharge pulse when the charge current reaches a peak threshold, which terminates in response to a reset indication. Current is discharged from the inductive element during the discharge pulse. A zero crossing detector provides the reset indication when the discharge current reaches a minimum level. A programmable timing circuit limits a duration of either one or both of the charge pulse and the discharge pulse to prevent hangup or excessive output voltage ripple. The DC-DC converter may include a memory that stores a digital value used to program the programmed time duration of the programmable timing circuit.
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