One way ranging synchronization and measurement

    公开(公告)号:US11686834B2

    公开(公告)日:2023-06-27

    申请号:US17486037

    申请日:2021-09-27

    IPC分类号: G01S13/40 G01S5/02

    CPC分类号: G01S13/40 G01S5/021

    摘要: A system and method for one-way ranging is disclosed. The system comprises a transmitter, also referred to as tag, transmitting a packet having a first frequency. The receiver, also referred to as the locator, receives the first frequency and measures the phase at a specific point in time. At a predetermined time, the transmitter switches to a second frequency. This is performed while maintaining phase continuity. The receiver also switches to the second frequency at nearly the same time. The receiver then measures the phase of the second frequency at a second point in time. Based on these two phase measurements, the distance between the transmitter and the receiver may be calculated.

    One Way Ranging Synchronization And Measurement

    公开(公告)号:US20230015164A1

    公开(公告)日:2023-01-19

    申请号:US17486037

    申请日:2021-09-27

    IPC分类号: G01S13/40 G01S5/02

    摘要: A system and method for one-way ranging is disclosed. The system comprises a transmitter, also referred to as tag, transmitting a packet having a first frequency. The receiver, also referred to as the locator, receives the first frequency and measures the phase at a specific point in time. At a predetermined time, the transmitter switches to a second frequency. This is performed while maintaining phase continuity. The receiver also switches to the second frequency at nearly the same time. The receiver then measures the phase of the second frequency at a second point in time. Based on these two phase measurements, the distance between the transmitter and the receiver may be calculated.

    One way ranging measurement using sounding sequence

    公开(公告)号:US11368203B1

    公开(公告)日:2022-06-21

    申请号:US17486042

    申请日:2021-09-27

    IPC分类号: H04B7/06 H04L7/00 H04L5/00

    摘要: A system and method for one-way ranging is disclosed. The system comprises a transmitter, also referred to as a tag, transmitting a packet having a sounding sequence. The receiver, also referred to as the locator, receives the sounding sequence. The receiver measures and saves the phase at a plurality of points in time. The sounding sequence has two frequencies, which are additive inverses of one another. A discrete Fourier transform is performed on the plurality of phase measurements to determine the phase of each of the two frequencies. The difference between these two frequencies is related to the time that the packet traveled. Additionally, a calibration of the transmit path and/or receive path may be performed to improve the accuracy of the results.

    Maintaining phase coherence for a fractional-N PLL

    公开(公告)号:US12107588B2

    公开(公告)日:2024-10-01

    申请号:US18076058

    申请日:2022-12-06

    IPC分类号: H03L7/099 H03B5/32

    CPC分类号: H03L7/0991 H03B5/32

    摘要: A fractional-N phase-locked loop (PLL) that maintains phase coherence for an output signal with a plurality of possible output frequencies. The fractional-N PLL includes an oscillator, a phase detector to receive a reference clock signal and a feedback signal, and a multi-modulus divider coupled in a feedback path between the oscillator and the phase detector. A multi-modulus pattern generator supplies a drive pattern to the multi-modulus divider to achieve a desired change in frequency of the output signal. The multi-modulus pattern generator initiates the drive pattern at a boundary time to cause the output signal to have a substantially repeatable phase when restarting switching from any one of the output frequencies to any other of the output frequencies.

    MAINTAINING PHASE COHERENCE FOR A FRACTIONAL-N PLL

    公开(公告)号:US20240187005A1

    公开(公告)日:2024-06-06

    申请号:US18076058

    申请日:2022-12-06

    IPC分类号: H03L7/099 H03B5/32

    CPC分类号: H03L7/0991 H03B5/32

    摘要: A fractional-N phase-locked loop (PLL) that maintains phase coherence for an output signal with a plurality of possible output frequencies. The fractional-N PLL includes an oscillator, a phase detector to receive a reference clock signal and a feedback signal, and a multi-modulus divider coupled in a feedback path between the oscillator and the phase detector. A multi-modulus pattern generator supplies a drive pattern to the multi-modulus divider to achieve a desired change in frequency of the output signal. The multi-modulus pattern generator initiates the drive pattern at a boundary time to cause the output signal to have a substantially repeatable phase when restarting switching from any one of the output frequencies to any other of the output frequencies.