公开(公告)号：US10817200B2

公开(公告)日：2020-10-27

申请号：US15794008

申请日：2017-10-26

申请人： Silicon Laboratories Inc.

发明人： Partha Sarathy Murali ,  Venkata Siva Prasad Pulagam ,  Sailaja Dharani Naga Sankabathula ,  Venkat Rao Gunturu ,  Subba Reddy Kallam

IPC分类号： G06F3/06 ,  G06F13/40

摘要： A flash memory controller is operative to receive serial commands and command arguments. A flash permissions table identifies each segment of flash memory as READ_ONLY, PRIVATE_R/W or OPEN_R/W. A memory interface is coupled to a flash memory and also the flash permissions table. When a flash memory write operation is received with an associated command argument corresponding to an address indicated as READ_ONLY in the flash permissions table and a DISABLE_WR_REG is true, the write operation is ignored or converted into a non-write command and issued to the flash memory.