公开(公告)号：US20210278892A1

公开(公告)日：2021-09-09

申请号：US16884055

申请日：2020-05-27

Applicant: Silicon Motion, Inc.

Inventor： Kuo-Cyuan Kuo ,  Chih-Chiang Chen ,  I-Ta Chen

IPC: G06F1/3296 ,  G06F1/04 ,  G06F13/42

Abstract: An electronic device comprises a clock request pad, a multiplexer and a control circuit. The clock request pad is arranged to refer to a first control signal to operate under a low voltage level or a high voltage level, to indicate whether the electronic device needs a clock signal generated from a clock generation circuit external to the electronic device. Said multiplexer is arranged to refer to a second control signal to output one of a voltage level of the clock request pad and a predetermined voltage level to function as a multiplexer output signal. The control circuit is coupled to said multiplexer, and refers to said multiplexer output signal to determine whether to control the electronic device to operate in a power-saving mode.

公开(公告)号：US20230012997A1

公开(公告)日：2023-01-19

申请号：US17475366

申请日：2021-09-15

Applicant: Silicon Motion, Inc.

Inventor： Wen-Shu Chen ,  Kuo-Cyuan Kuo ,  I-Ta Chen ,  Chih-Chiang Chen

IPC: G06F13/16

Abstract: A method for performing access management of a memory device in predetermined communications architecture with aid of flexible delay time control and associated apparatus are provided. The method may include: utilizing at least one upper layer controller of a transmission interface circuit within the memory controller to dynamically set a delay parameter regarding transmission from the memory device to a host device, for preventing sleeping in delay time(s) corresponding to the delay parameter; utilizing a physical layer (PHY) circuit of the transmission interface circuit to transmit first data from the memory device to the host device, wherein a first delay time starts from a first time point at which transmitting the first data from the memory device to the host device is completed; and utilizing the PHY circuit to start transmitting second data from the memory device to the host device in the first delay time without restarting from sleeping.

公开(公告)号：US11972113B2

公开(公告)日：2024-04-30

申请号：US17874270

申请日：2022-07-26

Applicant: Silicon Motion, Inc.

Inventor： Bo-Chang Ye ,  Kuo-Cyuan Kuo ,  Chih-Chiang Chen

IPC: G06F3/06

CPC classification number: G06F3/0617 ,  G06F3/0635 ,  G06F3/0679

Abstract: A method for performing link management of a memory device in predetermined communications architecture with aid of handshaking phase transition control and associated apparatus are provided. The method may include: utilizing at least one upper layer controller of a transmission interface circuit to turn on a physical layer (PHY) circuit of the transmission interface circuit, for starting establishing a link between a host device and the memory device; before entering a first handshaking phase, utilizing the PHY circuit to receive any first incoming data sent from the host device to determine whether the any first incoming data indicates that the host device is in a corresponding first handshaking phase; and in response to the any first incoming data indicating that the host device is in the corresponding first handshaking phase, utilizing the PHY circuit to send first outgoing data that is equal to first predetermined data to the host device.

公开(公告)号：US20240036738A1

公开(公告)日：2024-02-01

申请号：US17874270

申请日：2022-07-26

Applicant: Silicon Motion, Inc.

Inventor： Bo-Chang Ye ,  Kuo-Cyuan Kuo ,  Chih-Chiang Chen

IPC: G06F3/06

CPC classification number: G06F3/0617 ,  G06F3/0679 ,  G06F3/0635

Abstract: A method for performing link management of a memory device in predetermined communications architecture with aid of handshaking phase transition control and associated apparatus are provided. The method may include: utilizing at least one upper layer controller of a transmission interface circuit to turn on a physical layer (PHY) circuit of the transmission interface circuit, for starting establishing a link between a host device and the memory device; before entering a first handshaking phase, utilizing the PHY circuit to receive any first incoming data sent from the host device to determine whether the any first incoming data indicates that the host device is in a corresponding first handshaking phase; and in response to the any first incoming data indicating that the host device is in the corresponding first handshaking phase, utilizing the PHY circuit to send first outgoing data that is equal to first predetermined data to the host device.

公开(公告)号：US11636055B2

公开(公告)日：2023-04-25

申请号：US17475366

申请日：2021-09-15

Applicant: Silicon Motion, Inc.

Inventor： Wen-Shu Chen ,  Kuo-Cyuan Kuo ,  I-Ta Chen ,  Chih-Chiang Chen

IPC: G06F13/16

Abstract: A method for performing access management of a memory device in predetermined communications architecture with aid of flexible delay time control and associated apparatus are provided. The method may include: utilizing at least one upper layer controller of a transmission interface circuit within the memory controller to dynamically set a delay parameter regarding transmission from the memory device to a host device, for preventing sleeping in delay time(s) corresponding to the delay parameter; utilizing a physical layer (PHY) circuit of the transmission interface circuit to transmit first data from the memory device to the host device, wherein a first delay time starts from a first time point at which transmitting the first data from the memory device to the host device is completed; and utilizing the PHY circuit to start transmitting second data from the memory device to the host device in the first delay time without restarting from sleeping.

公开(公告)号：US11112855B1

公开(公告)日：2021-09-07

申请号：US16884055

申请日：2020-05-27

Applicant: Silicon Motion, Inc.

Inventor： Kuo-Cyuan Kuo ,  Chih-Chiang Chen ,  I-Ta Chen

IPC: G06F1/3296 ,  G06F13/42 ,  G06F1/04

Abstract: An electronic device comprises a clock request pad, a multiplexer and a control circuit. The clock request pad is arranged to refer to a first control signal to operate under a low voltage level or a high voltage level, to indicate whether the electronic device needs a clock signal generated from a clock generation circuit external to the electronic device. Said multiplexer is arranged to refer to a second control signal to output one of a voltage level of the clock request pad and a predetermined voltage level to function as a multiplexer output signal. The control circuit is coupled to said multiplexer, and refers to said multiplexer output signal to determine whether to control the electronic device to operate in a power-saving mode.