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公开(公告)号:US10817213B2
公开(公告)日:2020-10-27
申请号:US15858066
申请日:2017-12-29
Applicant: Silicon Motion, Inc.
Inventor: Ming-Hung Chang , Kuo-Yuan Hsu
Abstract: A data storage device in a two-layer control structure is provided. A control unit of the data storage device has a command processor and a first non-volatile memory (NVM) controller. The command processor is operative to communicate with a host. The first non-volatile memory (NVM) controller operates a first NVM of the data storage device. Earlier than the command processor operates according to a ROM image corresponding to the command processor, the first NVM controller operates according to a ROM image corresponding to the first NVM controller to access the first NVM to get a firmware image for the command processor and loads the command processor with the firmware image.
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公开(公告)号:US20190129850A1
公开(公告)日:2019-05-02
申请号:US16117115
申请日:2018-08-30
Applicant: Silicon Motion, Inc.
Inventor: Ming-Hung Chang , Fang-I Peng
IPC: G06F12/0804
CPC classification number: G06F12/0804 , G06F12/0246 , G06F2212/1036 , G06F2212/205 , G06F2212/608 , G06F2212/7201 , G06F2212/7203
Abstract: An efficient data storage device is disclosed, which uses a microprocessor and at least one volatile memory to operate a non-volatile memory. The microprocessor allocates the volatile memory to provide a cache area. According to an asynchronous event request (AER) issued by a host, the microprocessor uses the cache area to collect sections of write data requested by the host, programs the sections of write data collected in the cache area to the non-volatile memory together, and reports failed programming of the sections of write data to the host by AER completion information.
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公开(公告)号:US10783037B2
公开(公告)日:2020-09-22
申请号:US16170249
申请日:2018-10-25
Applicant: Silicon Motion, Inc.
Inventor: Ming-Hung Chang , Kuo-Yuan Hsu
IPC: G06F11/00 , G06F11/10 , G06F12/1009
Abstract: A data storage device with fault-tolerant design. The data storage device has a RAID (Redundant Array of Independent Disks) engine that generates RAID checking code for user data requested in a write command. The user data is programmed to a non-volatile memory according to a target physical address indicated in the write command. The RAID checking code is programmed to the non-volatile memory according to a reserved physical address. The user data and the RAID checking code are programmed to a stripe of pages within a stripe of blocks.
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公开(公告)号:US10761982B2
公开(公告)日:2020-09-01
申请号:US16117115
申请日:2018-08-30
Applicant: Silicon Motion, Inc.
Inventor: Ming-Hung Chang , Fang-I Peng
IPC: G06F12/00 , G06F12/08 , G06F13/00 , G06F12/0804 , G06F12/02
Abstract: An efficient data storage device is disclosed, which uses a microprocessor and at least one volatile memory to operate a non-volatile memory. The microprocessor allocates the volatile memory to provide a cache area. According to an asynchronous event request (AER) issued by a host, the microprocessor uses the cache area to collect sections of write data requested by the host, programs the sections of write data collected in the cache area to the non-volatile memory together, and reports failed programming of the sections of write data to the host by AER completion information.
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公开(公告)号:US10691342B2
公开(公告)日:2020-06-23
申请号:US15938413
申请日:2018-03-28
Applicant: Silicon Motion, Inc.
Inventor: Shu-Lei Chen , Ming-Hung Chang
IPC: G06F3/06
Abstract: An optimized non-volatile memory operating method. A data storage device has a plurality of non-volatile memory spaces and a plurality of command queues. The command queues are provided to correspond to the non-volatile storage memory one on one. The same channel is shared to operate the non-volatile memory spaces. To deal with the one channel communication technology, the data storage device adopts task switching mechanisms to switch between the different command queues for execution of the operational commands queued in the different command queues.
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公开(公告)号:US11157175B2
公开(公告)日:2021-10-26
申请号:US15930675
申请日:2020-05-13
Applicant: Silicon Motion, Inc.
Inventor: Shu-Lei Chen , Ming-Hung Chang
IPC: G06F3/06
Abstract: An optimized non-volatile memory operating method. A data storage device has a plurality of non-volatile memory spaces, a plurality of command queues, and a controller. The command queues are provided to correspond to the non-volatile memory spaces one on one. The controller adds task switching commands into the command queues. The non-volatile memory spaces are operated through the same channel. The sharing of the same channel between the non-volatile memory spaces is optimized by the task switching commands.
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