公开(公告)号：US20200089608A1

公开(公告)日：2020-03-19

申请号：US16445136

申请日：2019-06-18

Applicant: Silicon Motion Inc.

Inventor： Ting-Heng Chou ,  Jian-Wei Sun

IPC: G06F12/02 ,  G06F12/1009

Abstract: A high efficiency garbage collection method, an associated data storage device and a controller thereof are provided. The high efficiency garbage collection method includes: starting and executing a garbage collection procedure; determining whether a Trim command from a host device is received; in response to the Trim command being received, determining whether target data of the Trim command is stored in a source block of the garbage collection procedure; in response to the target data being stored in the source block, determining whether the target data stored in the source block has been copied to a destination block of the garbage collection procedure; and in response to the target data stored in the source block having been copied to the destination block, changing at least one physical address of the target data of the Trim command to a Trim tag in a logical-to-physical address mapping table.

公开(公告)号：US11210226B2

公开(公告)日：2021-12-28

申请号：US16851572

申请日：2020-04-17

Applicant: Silicon Motion, Inc.

Inventor： Jui-Lin Yen ,  Sheng-Hsun Lin ,  Jian-Wei Sun

IPC: G06F12/0866

Abstract: A data storage device is provided. The data storage device includes a flash memory, a dynamic random access memory (DRAM), and a memory controller. The flash memory is configured to store a logical-to-physical mapping (L2P) table that is divided into a plurality of group-mapping (G2P) tables. The memory controller includes a first processing core and a second processing core. The first processing core receives a host access command from a host. When a specific G2P table corresponding to a specific logical address in the host access command is not stored in the DRAM, the first processing core determines whether the second processing core has loaded the specific G2P table from the flash memory to the DRAM according to the values in a first column in a first bit map and in a second column of a second bit map.

公开(公告)号：US20200081832A1

公开(公告)日：2020-03-12

申请号：US16542311

申请日：2019-08-16

Applicant: Silicon Motion, Inc.

Inventor： Kuei-Sung Hsu ,  Jian-Wei Sun ,  Ting-Heng Chou

IPC: G06F12/02 ,  G06F12/0802 ,  G06F3/06

Abstract: A mapping table updating method executable by a data storage device is provided. The data storage device includes a non-volatile memory and a controller. The mapping table updating method includes steps of: step A: configuring the controller to process a command issued by a host, and determine whether to trigger a partial garbage collection procedure when the command is a write command; when it is determined to trigger the partial garbage collection procedure, then performing step B: copying partial valid data in at least one source block to a destination block according to a segmentation condition; and step C: updating a logical-to-physical address mapping table of the data storage device according to a logical address of the copied partial valid data and a physical address in the destination block where the partial valid data is located, and returning to perform the step A.

公开(公告)号：US11086798B2

公开(公告)日：2021-08-10

申请号：US16728888

申请日：2019-12-27

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Te Li ,  Sheng-Hsun Lin ,  Kuei-Sung Hsu ,  Jian-Wei Sun

IPC: G06F12/00 ,  G06F12/14 ,  G06F12/02

Abstract: The invention introduces a method for controlling data access to a flash memory, performed by a processing unit, including steps of: obtaining a logical address associated with a data read operation; determining whether a group table corresponding to the logical address is queued in a locked queue, or a hot zone of a swap queue; and prohibiting content of the locked queue and the swap queue from being modified when the group table corresponding to the logical address is queued in the locked queue, or the hot zone of the swap queue.

公开(公告)号：US11068391B2

公开(公告)日：2021-07-20

申请号：US16542311

申请日：2019-08-16

Applicant: Silicon Motion, Inc.

Inventor： Kuei-Sung Hsu ,  Jian-Wei Sun ,  Ting-Heng Chou

IPC: G06F12/00 ,  G06F12/02 ,  G06F11/10 ,  G06F12/0802 ,  G06F3/06 ,  G11C11/4063

Abstract: A mapping table updating method executable by a data storage device is provided. The data storage device includes a non-volatile memory and a controller. The mapping table updating method includes steps of: step A: configuring the controller to process a command issued by a host, and determine whether to trigger a partial garbage collection procedure when the command is a write command; when it is determined to trigger the partial garbage collection procedure, then performing step B: copying partial valid data in at least one source block to a destination block according to a segmentation condition; and step C: updating a logical-to-physical address mapping table of the data storage device according to a logical address of the copied partial valid data and a physical address in the destination block where the partial valid data is located, and returning to perform the step A.

公开(公告)号：US11216189B2

公开(公告)日：2022-01-04

申请号：US16730159

申请日：2019-12-30

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Te Li ,  Jian-Wei Sun ,  Ting-Heng Chou

IPC: G06F12/00 ,  G06F3/06

Abstract: A non-transitory computer-readable storage medium, a method, and an apparatus for reading partial data of a page on multiple data planes are provided. A processor core when loading and executing program code is arranged operably to: select at least two flash-memory access commands, which individually reads data whose length (e.g., 4KB or 8KB) is shorter than a length (e.g., 16KB) of one page across data planes for a logical unit number (LUN) according to the content of scheduling table; integrate the selected flash-memory access commands into one MPR-Lite command; drive a flash interface to perform a multi-page read lite (MPR-Lite) operation by executing the MPR-Lite command rather than the flash-memory access commands to read data from the LUN; and reply with read data to a host. Therefore, the time delay between the execution of selected flash-memory access commands would be reduced.

公开(公告)号：US11030093B2

公开(公告)日：2021-06-08

申请号：US16445136

申请日：2019-06-18

Applicant: Silicon Motion Inc.

Inventor： Ting-Heng Chou ,  Jian-Wei Sun

IPC: G06F12/00 ,  G06F12/02 ,  G06F12/1009

Abstract: A high efficiency garbage collection method, an associated data storage device and a controller thereof are provided. The high efficiency garbage collection method includes: starting and executing a garbage collection procedure; determining whether a Trim command from a host device is received; in response to the Trim command being received, determining whether target data of the Trim command is stored in a source block of the garbage collection procedure; in response to the target data being stored in the source block, determining whether the target data stored in the source block has been copied to a destination block of the garbage collection procedure; and in response to the target data stored in the source block having been copied to the destination block, changing at least one physical address of the target data of the Trim command to a Trim tag in a logical-to-physical address mapping table.

公开(公告)号：US10776280B1

公开(公告)日：2020-09-15

申请号：US16429415

申请日：2019-06-03

Applicant: Silicon Motion, Inc.

Inventor： Chen-Ning Yang ,  Chien-Chung Chung ,  Jian-Wei Sun

IPC: G06F12/1027 ,  G06F12/1009 ,  G06F3/06

Abstract: A data storage device is provided. The data storage includes: a flash memory, a dynamic random access memory (DRAM), and a memory controller. The flash memory stores a logical-to-physical mapping (L2P) table that is divided into a plurality of group-mapping (G2P) tables, and includes a first logical unit number (LUN) and a second LUN that are respectively controlled by a first chip enable (CE) signal and a second CE signal. The memory controller receives a write command from a host, and forms super page data using logical pages of data in the write command. The memory controller reads one of the group-mapping tables from the first LUN or the second LUN to the DRAM after sequentially enabling the first CE signal and second CE signal to write a first portion and a second portion of the super page data to the first LUN and the second LUN.