公开(公告)号：US08560899B2

公开(公告)日：2013-10-15

申请号：US12847450

申请日：2010-07-30

申请人： Simon Brewerton ,  Neil Hastie ,  Paul Hubbert ,  Klaus Oberlaender ,  Robert Wiesner ,  Antonio Vilela ,  Alfred Eder ,  Glenn Ashley Farrall

发明人： Simon Brewerton ,  Neil Hastie ,  Paul Hubbert ,  Klaus Oberlaender ,  Robert Wiesner ,  Antonio Vilela ,  Alfred Eder ,  Glenn Ashley Farrall

IPC分类号： G06F11/00

CPC分类号： G11C29/44 ,  G11C29/024 ,  G11C29/025 ,  G11C2029/0411

摘要： The disclosed invention provides a structure and method for detecting address line (e.g., wordline, bitline) memory failures. In one embodiment, the method and structure comprise generating an address signature, by re-encoding an internally generated address signal from activated elements (e.g., wordlines) inside a memory array. The regenerated address signature may be compared with a requested memory address location. If the regenerated address signature and memory location are equal than there is no error in the memory array, but if the regenerated address signature and memory location are equal than an error is present in the memory array. Accordingly, re-encoding an address signature provides a closed loop check that a wordline and/or bitline, that was actually activated in a memory array, was the correct requested wordline and/or bitline, that no other wordlines or bitlines were also triggered, and that the wordline and/or bitline is continuous.

摘要翻译： 所公开的发明提供了用于检测地址线（例如，字线，位线）存储器故障的结构和方法。 在一个实施例中，该方法和结构包括通过从存储器阵列内部的激活元件（例如，字线）重新编码内部产生的地址信号来生成地址签名。 再生地址签名可以与请求的存储器地址位置进行比较。 如果再生地址签名和存储器位置等于存储器阵列中没有错误，但是如果再生地址签名和存储器位置等于存储器阵列中存在错误。 因此，对地址签名的重新编码提供闭环检查，即在存储器阵列中实际激活的字线和/或位线是正确请求的字线和/或位线，没有其他字线或位线也被触发， 字线和/或位线是连续的。

公开(公告)号：US20120030531A1

公开(公告)日：2012-02-02

申请号：US12847450

申请日：2010-07-30

申请人： Simon Brewerton ,  Neil Hastie ,  Paul Hubbert ,  Klaus Oberlaender ,  Robert Wiesner ,  Antonio Vilela ,  Alfred Eder

发明人： Simon Brewerton ,  Neil Hastie ,  Paul Hubbert ,  Klaus Oberlaender ,  Robert Wiesner ,  Antonio Vilela ,  Alfred Eder

IPC分类号： G11C29/04 ,  G06F11/22 ,  G11C8/10

CPC分类号： G11C29/44 ,  G11C29/024 ,  G11C29/025 ,  G11C2029/0411

摘要： The disclosed invention provides a structure and method for detecting address line (e.g., wordline, bitline) memory failures. In one embodiment, the method and structure comprise generating an address signature, by re-encoding an internally generated address signal from activated elements (e.g., wordlines) inside a memory array. The regenerated address signature may be compared with a requested memory address location. If the regenerated address signature and memory location are equal than there is no error in the memory array, but if the regenerated address signature and memory location are equal than an error is present in the memory array. Accordingly, re-encoding an address signature provides a closed loop check that a wordline and/or bitline, that was actually activated in a memory array, was the correct requested wordline and/or bitline, that no other wordlines or bitlines were also triggered, and that the wordline and/or bitline is continuous.

摘要翻译： 所公开的发明提供了用于检测地址线（例如，字线，位线）存储器故障的结构和方法。 在一个实施例中，该方法和结构包括通过从存储器阵列内部的激活元件（例如，字线）重新编码内部产生的地址信号来生成地址签名。 再生地址签名可以与请求的存储器地址位置进行比较。 如果再生地址签名和存储器位置等于存储器阵列中没有错误，但是如果再生地址签名和存储器位置等于存储器阵列中存在错误。 因此，对地址签名的重新编码提供闭环检查，即在存储器阵列中实际激活的字线和/或位线是正确请求的字线和/或位线，没有其他字线或位线也被触发， 字线和/或位线是连续的。