公开(公告)号：US07661104B2

公开(公告)日：2010-02-09

申请号：US10714482

申请日：2003-11-17

申请人： Simon Charles Watt ,  Christopher Bentley Dornan ,  Luc Orion ,  Nicolas Chaussade ,  Lionel Belnet ,  Stephane Eric Sebastian Brochier ,  David Hennah Mansell ,  Dominic Hugo Symes

发明人： Simon Charles Watt ,  Christopher Bentley Dornan ,  Luc Orion ,  Nicolas Chaussade ,  Lionel Belnet ,  Stephane Eric Sebastian Brochier ,  David Hennah Mansell ,  Dominic Hugo Symes

IPC分类号： G06F9/455 ,  G06F9/46 ,  G06F3/00 ,  H04L29/06

CPC分类号： G06F9/4812 ,  G06F9/526

摘要： A processor may utilise two operating systems (Non-Secure, Secure) between which calls may be made. In order that a second operating system can track task switches made by a first operating system, each time a call is made to the second operating system, this call includes an identifier to enable discrimination between the task which was executing on the first operating system when that call was made. The identifier can be a call identifier and/or a target thread identifier and may include further parameters.

摘要翻译： 处理器可以利用两个可以进行呼叫的操作系统（非安全的，安全的）。 为了使第二操作系统能够跟踪由第一操作系统进行的任务切换，每次对第二操作系统进行呼叫时，该呼叫包括标识符，以便能够在第一操作系统上执行的任务之间进行区分， 那个电话是做的。 标识符可以是呼叫标识符和/或目标线程标识符，并且可以包括其他参数。

公开(公告)号：US08151055B2

公开(公告)日：2012-04-03

申请号：US12379615

申请日：2009-02-25

申请人： Louis-Marie Vincent Mouton ,  Nicolas Jean Phillippe Huot ,  Gilles Eric Grandou ,  Stephane Eric Sebastian Brochier

发明人： Louis-Marie Vincent Mouton ,  Nicolas Jean Phillippe Huot ,  Gilles Eric Grandou ,  Stephane Eric Sebastian Brochier

IPC分类号： G06F12/00

CPC分类号： G06F12/0864

摘要： A data processing apparatus includes a data processor, and a data store for storing a plurality of identifiers identifying a cache way in which a corresponding value from a set associative cache is stored. The plurality of identifiers corresponding to a plurality of values stored in consecutive addresses such that a data store stores identifiers for values stored in a region of said memory. Included is a current pointer store for pointing to a most recently accessed storage location in said data store and circuitry to determine an offset of an address of said cache access request to an immediately preceding cache access request. Lookup circuitry determines if said pointer is pointing to an address within said region and said data processor identifies said cache way from said stored identifier pointed to by said current pointer if it has a valid indicator associated therewith.

摘要翻译： 数据处理装置包括数据处理器和数据存储器，用于存储识别从存储组合关联高速缓冲存储器的相应值的高速缓存方式的多个标识符。 多个标识符对应于存储在连续地址中的多个值，使得数据存储器存储存储在所述存储器的区域中的值的标识符。 包括用于指向所述数据存储器中最近访问的存储位置的当前指针存储器以及用于确定所述高速缓存访​​问请求的地址到紧邻的高速缓存访​​问请求的偏移的电路。 查找电路确定所述指针是否指向所述区域内的地址，并且如果所述指针具有与其相关联的有效指示符，则所述数据处理器从所述当前指针指向的所存储的标识符中识别所述高速缓存方式。

公开(公告)号：US20090235029A1

公开(公告)日：2009-09-17

申请号：US12379615

申请日：2009-02-25

申请人： Louis-Marie Vincent Mouton ,  Nicolas Jean Phillippe Huot ,  Gilles Eric Grandou ,  Stephane Eric Sebastian Brochier

发明人： Louis-Marie Vincent Mouton ,  Nicolas Jean Phillippe Huot ,  Gilles Eric Grandou ,  Stephane Eric Sebastian Brochier

IPC分类号： G06F12/08 ,  G06F12/00

CPC分类号： G06F12/0864

摘要： A data processing apparatus is disclosed that comprises: at least one data processor for processing data; a set associative cache for storing a plurality of values to be processed by said data processor, each value being identified by an address of a memory location within a memory storing said value, said set associative cache being divided into a plurality of cache ways; a data store comprising a plurality of storage locations for storing a plurality of identifiers, each identifier identifying a cache way that a corresponding value from said set associative cache is stored in and each having a valid indicator associated therewith, said plurality of identifiers corresponding to a plurality of values, said plurality of values being values stored in consecutive addresses such that said data store stores identifiers for values stored in a region of said memory; current pointer store for storing a current pointer pointing to a most recently accessed storage location in said data store; offset determining circuitry responsive to a cache access request to determine an offset of an address of said cache access request to an immediately preceding cache access request, said offset determining circuitry being adapted to update said current pointer by said offset amount; and data store lookup circuitry for determining from a size of said data store and said offset if said updated current pointer is pointing to an address within said region and if so said data processor is adapted to identify said cache way from said stored identifier pointed to by said current pointer if it has a valid indicator associated with it.

摘要翻译： 公开了一种数据处理装置，包括：用于处理数据的至少一个数据处理器; 用于存储要由所述数据处理器处理的多个值的集合关联高速缓冲存储器，每个值由存储所述值的存储器内的存储器位置的地址标识，所述集合关联高速缓存被分为多个高速缓存路径; 数据存储器，包括用于存储多个标识符的多个存储位置，每个标识符标识来自所述组相关高速缓存的相应值被存储在每个标识符中，并且每个具有与之相关联的有效指示符的高速缓存方式，所述多个标识符对应于 多个值，所述多个值是存储在连续地址中的值，使得所述数据存储存储存储在所述存储器的区域中的值的标识符; 当前指针存储器，用于存储指向所述数据存储器中最近访问的存储位置的当前指针; 偏移确定电路，响应于高速缓存访​​问请求，以确定所述高速缓存访​​问请求的地址偏移到紧接在前的高速缓存访​​问请求，所述偏移确定电路适于将所述当前指针更新所述偏移量; 以及数据存储查找电路，用于根据所述数据存储器的大小和所述偏移量确定所述更新的当前指针是否指向所述区域内的地址，如果是，则所述数据处理器适于从所述存储的标识符指向的所述标识符 表示当前指针是否具有与之相关联的有效指示符。