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    Exception types within a secure processing system
    1.
    发明授权
    Exception types within a secure processing system 有权
    安全处理系统中的异常类型

    公开(公告)号：US07949866B2

    公开(公告)日：2011-05-24

    申请号：US12382647

    申请日：2009-03-20

    Applicant: Simon Charles Watt ,  Christopher Bentley Dornan ,  Luc Orion ,  Nicolas Chaussade ,  Lionel Belnet ,  Stephane Eric Sebastien Brochier

    Inventor： Simon Charles Watt ,  Christopher Bentley Dornan ,  Luc Orion ,  Nicolas Chaussade ,  Lionel Belnet ,  Stephane Eric Sebastien Brochier

    IPC: G06F1/24

    CPC classification number: G06F21/74 ,  G06F9/4812 ,  G06F2209/481

    Abstract: An apparatus for processing data includes a processor operable in a plurality modes including at least one secure mode being a mode in a secure domain and at least one non-secure mode being a mode in a non-secure domain. When the processor is executing a program in a secure mode the program has access to secure data which is not accessible when the processor is operating in a non-secure mode. The processor is responsive to one or more exception conditions for triggering exception processing using an exception handler. The processor is operable to select the exception handler from among a plurality of possible exception handlers in dependence upon whether the processor is operating in the secure domain or the non-secure domain.

    Abstract translation: 一种用于处理数据的装置包括可以以多种模式操作的处理器，包括至少一种安全模式，即安全域中的模式，以及至少一种非安全模式是非安全域中的模式。 当处理器以安全模式执行程序时，程序可以访问当处理器以非安全模式运行时无法访问的安全数据。 处理器响应于一个或多个异常条件，以使用异常处理程序触发异常处理。 处理器可操作以依赖于处理器是否在安全域或非安全域中操作从多个可能的异常处理程序中选择异常处理程序。

    Vectored interrupt control within a system having a secure domain and a non-secure domain
    2.
    发明申请
    Vectored interrupt control within a system having a secure domain and a non-secure domain 有权
    具有安全域和非安全域的系统内的向量中断控制

    公开(公告)号：US20050160210A1

    公开(公告)日：2005-07-21

    申请号：US10714562

    申请日：2003-11-17

    Applicant: Simon Watt ,  Christopher Dornan ,  Luc Orion ,  Nicolas Chaussade ,  Lionel Belnet ,  Stephane Brochier ,  David Mansell ,  Jonathan Callan

    Inventor： Simon Watt ,  Christopher Dornan ,  Luc Orion ,  Nicolas Chaussade ,  Lionel Belnet ,  Stephane Brochier ,  David Mansell ,  Jonathan Callan

    IPC: G06F9/48 ,  G06F13/24

    CPC classification number: G06F9/4812

    Abstract: There is provided an apparatus for processing data, said apparatus comprising: a processor operable in a plurality of modes and either a secure domain or a non-secure domain including: at least one secure mode being a mode in said secure domain; and at least one non-secure mode being a mode in said non-secure domain; wherein when said processor is executing a program in a secure mode said program has access to secure data which is not accessible when said processor is operating in a non-secure mode; and a vectored interrupt controller operable to generate an exception handler address for supply to said processor in response to occurrence of an exception condition in accordance with programmable parameters specifying: for each of a plurality of exception conditions, a domain value indicating whether said exception condition should trigger an exception handler in said secure domain or said non-secure domain; for each of said plurality of exception conditions, an exception handler address for use if said exception condition occurs when said processor is operating in that one of said secure domain and said non-secure domain indicated by said domain value; and at least one domain switching exception handler address shared between said plurality of exception conditions for use if said exception condition occurs when said processor is not operating in that one of said secure domain and said non-secure domain indicated by said domain value.

    Abstract translation: 提供了一种用于处理数据的装置，所述装置包括：可以多种模式操作的处理器，以及安全域或非安全域，包括：至少一种安全模式是所述安全域中的模式; 并且至少一个非安全模式是所述非安全域中的模式; 其中当所述处理器以安全模式执行程序时，所述程序具有访问当所述处理器以非安全模式操作时不可访问的安全数据; 以及向量中断控制器，其可操作以产生异常处理程序地址，以响应于根据可编程参数发生异常情况而向所述处理器供应，所述可编程参数指定：对于多个异常条件中的每一个，指示所述异常条件是否应当 在所述安全域或所述非安全域中触发异常处理程序; 对于所述多个异常条件中的每一个，如果当所述处理器在由所述域值指示的所述安全域和所述非安全域中的一个中操作时发生所述异常条件，则使用异常处理程序地址; 以及当所述处理器不在由所述域值指示的所述安全域和所述非安全域中的所述安全域中的任何一个时发生所述异常条件时，在所述多个异常条件之间共享的所述多个异常条件之间共享的至少一个域切换异常处理程序地址。

    Exception types within a secure processing system
    4.
    发明申请
    Exception types within a secure processing system 有权
    安全处理系统中的异常类型

    公开(公告)号：US20090259846A1

    公开(公告)日：2009-10-15

    申请号：US12382647

    申请日：2009-03-20

    Applicant: Simon Charles Watt ,  Christopher Bentley Dornan ,  Luc Orion ,  Nicolas Chaussade ,  Lionel Belnet ,  Stephanie Eric Sebastien Brochier

    Inventor： Simon Charles Watt ,  Christopher Bentley Dornan ,  Luc Orion ,  Nicolas Chaussade ,  Lionel Belnet ,  Stephanie Eric Sebastien Brochier

    IPC: H04L9/00

    CPC classification number: G06F21/74 ,  G06F9/4812 ,  G06F2209/481

    Abstract: An apparatus for processing data includes a processor operable in a plurality modes including at least one secure mode being a mode in a secure domain and at least one non-secure mode being a mode in a non-secure domain. When the processor is executing a program in a secure mode the program has access to secure data which is not accessible when the processor is operating in a non-secure mode. The processor is responsive to one or more exception conditions for triggering exception processing using an exception handler. The processor is operable to select the exception handler from among a plurality of possible exception handlers in dependence upon whether the processor is operating in the secure domain or the non-secure domain.

    Abstract translation: 一种用于处理数据的装置包括可以以多种模式操作的处理器，包括至少一种安全模式，即安全域中的模式，以及至少一种非安全模式是非安全域中的模式。 当处理器以安全模式执行程序时，程序可以访问当处理器以非安全模式运行时无法访问的安全数据。 处理器响应于一个或多个异常条件，以使用异常处理程序触发异常处理。 处理器可操作以依赖于处理器是否在安全域或非安全域中操作从多个可能的异常处理程序中选择异常处理程序。

    Data processing apparatus
    7.
    发明授权
    Data processing apparatus 有权
    数据处理装置

    公开(公告)号：US07840001B2

    公开(公告)日：2010-11-23

    申请号：US11266474

    申请日：2005-11-04

    Applicant: Lionel Belnet ,  Stephane Eric Sebastien Brochier ,  Simon Andrew Ford

    Inventor： Lionel Belnet ,  Stephane Eric Sebastien Brochier ,  Simon Andrew Ford

    IPC: H04K1/06

    CPC classification number: G06F9/3836 ,  G06F9/3855

    Abstract: Data processing apparatus and methods are provided. One data processing apparatus comprises: a plurality of pipelined stages, each of the plurality pipelined stages being operable in each processing cycle to receive a group of data elements from an earlier pipelined stage; permute logic operable to buffer ‘n’ of the groups of data elements over a corresponding ‘n’ processing cycles thereby creating a bubble within pipelined stages, and forwarding logic operable, once the ‘n’ of the groups of data elements have been buffered by the permute logic, to forward permuted groups of data elements comprising the data elements reordered by the permute logic to fill the bubble within the pipelined stages. By forwarding the data elements to fill the bubble an improved throughput can be achieved and since a constant stream of data can be transformed without the need to increase the number of input or output registers required to support the permute logic, the need to duplicate the permute logic or the need to introduce any additional storage elements.

    Abstract translation: 提供数据处理装置和方法。 一个数据处理装置包括：多个流水线级，多个流水线阶段中的每一个在每个处理周期中可操作以从较早的流水线阶段接收一组数据元素; 置换逻辑可操作以在相应的“n”个处理周期中缓冲数据组组中的“n”，从而在流水线阶段内产生气泡，一旦数据组组中的“n”已被 置换逻辑，以将包括由置换逻辑重新排序的数据元素的数据元素组置换以填充流水线阶段内的气泡。 通过转发数据元素以填充气泡，可以实现改进的吞吐量，并且由于可以变换恒定的数据流，而不需要增加支持置换逻辑所需的输入或输出寄存器的数量，所以需要重复置换 逻辑或需要引入任何额外的存储元件。

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