公开(公告)号：US20230260987A1

公开(公告)日：2023-08-17

申请号：US18105477

申请日：2023-02-03

Applicant: Socionext Inc.

Inventor： Masayoshi KOJIMA

IPC: H01L27/02

CPC classification number: H01L27/0285 ,  H01L27/0292

Abstract: A semiconductor device includes: an ESD protection circuit including a first n-channel MOS transistor provided between a signal terminal and a ground wire; and a control circuit electrically connected to the signal terminal, wherein, while a signal of a high level is being supplied to the signal terminal, the control circuit outputs a first voltage dropped from a high-level voltage of the signal to a gate of the first n-channel MOS transistor, and in response to a surge due to ESD being input into the signal terminal, outputs a second voltage lower than the first voltage to the gate of the first n-channel MOS transistor.