公开(公告)号：US12046301B2

公开(公告)日：2024-07-23

申请号：US18468078

申请日：2023-09-15

Applicant: Socionext Inc.

Inventor： Masanori Okinoi ,  Sachio Ogawa ,  Ryo Azumai ,  Kiichi Hamasaki

IPC: G11C16/32 ,  G11C7/22 ,  H03K19/0185 ,  G11C5/14

CPC classification number: G11C16/32 ,  G11C7/22 ,  H03K19/0185 ,  G11C5/144

Abstract: A semiconductor integrated circuit includes a buffer which outputs a memory control signal to a terminal coupled to a memory device, a power supply control circuit which controls a supply of a power supply voltage from a power supply line to the buffer based on a power control signal, a pull-up control circuit configured to control a pull-up of the terminal based on a pull-up control signal, and a control signal generating circuit. The control signal generating circuit generates, during an output period, the power control signal to supply the power supply voltage to the buffer, and the pull-up control signal to stop the pull-up of the terminal, and generates, during an idle period, the power control signal to stop the supply of the power supply voltage to the buffer, and the pull-up control signal to perform the pull-up of the terminal.

公开(公告)号：US11798635B2

公开(公告)日：2023-10-24

申请号：US17457291

申请日：2021-12-02

Applicant: Socionext Inc.

Inventor： Masanori Okinoi ,  Sachio Ogawa ,  Ryo Azumai ,  Kiichi Hamasaki

IPC: G11C16/32 ,  G11C7/22 ,  H03K19/0185 ,  G11C5/14

CPC classification number: G11C16/32 ,  G11C7/22 ,  H03K19/0185 ,  G11C5/144

Abstract: A semiconductor integrated circuit includes a buffer which outputs a memory control signal to a terminal coupled to a memory device, a power supply control circuit which controls a supply of a power supply voltage from a power supply line to the buffer based on a power control signal, a pull-up control circuit configured to control a pull-up of the terminal based on a pull-up control signal, and a control signal generating circuit. The control signal generating circuit generates, during an output period, the power control signal to supply the power supply voltage to the buffer, and the pull-up control signal to stop the pull-up of the terminal, and generates, during an idle period, the power control signal to stop the supply of the power supply voltage to the buffer, and the pull-up control signal to perform the pull-up of the terminal.

公开(公告)号：US20220093189A1

公开(公告)日：2022-03-24

申请号：US17457291

申请日：2021-12-02

Applicant: Socionext Inc.

Inventor： Masanori Okinoi ,  Sachio Ogawa ,  Ryo Azumai ,  Kiichi Hamasaki

IPC: G11C16/32 ,  G11C7/22 ,  H03K19/0185

Abstract: A semiconductor integrated circuit includes a buffer which outputs a memory control signal to a terminal coupled to a memory device, a power supply control circuit which controls a supply of a power supply voltage from a power supply line to the buffer based on a power control signal, a pull-up control circuit configured to control a pull-up of the terminal based on a pull-up control signal, and a control signal generating circuit. The control signal generating circuit generates, during an output period, the power control signal to supply the power supply voltage to the buffer, and the pull-up control signal to stop the pull-up of the terminal, and generates, during an idle period, the power control signal to stop the supply of the power supply voltage to the buffer, and the pull-up control signal to perform the pull-up of the terminal.