公开(公告)号：US20240387243A1

公开(公告)日：2024-11-21

申请号：US18688606

申请日：2022-10-19

Applicant: Soitec

Inventor： Youngpil Kim ,  Oleg Kononchuk ,  Chee Hoe Wong

IPC: H01L21/763 ,  H01L21/762 ,  H10N30/072

Abstract: A method for preparing a support substrate having a charge-trapping layer includes introducing a monocrystalline silicon base substrate into a chamber of deposition equipment and, without removing the base substrate from the chamber and while flushing the chamber with a carrier gas, performing the following successive steps: forming a dielectric layer on the base substrate by introducing a reactive gas into the chamber over a first time period; and forming a polycrystalline silicon charge-trapping layer directly on the dielectric layer by introducing a precursor gas containing silicon into the chamber over a second time period, subsequent to the first time period. The time for which the dielectric layer is exposed only to the carrier gas, between the first time period and the second time period, is less than 30 seconds and the formation of the charge-trapping layer is performed at a temperature strictly between 1010° C. and 1200° C.

公开(公告)号：US20240071755A1

公开(公告)日：2024-02-29

申请号：US18261605

申请日：2021-12-23

Applicant: Soitec ,  Applied Materials Inc

Inventor： Oleg Kononchuk ,  Christophe Maleville ,  Isabelle Bertrand ,  Youngpil Kim ,  Chee Hoe Wong

IPC: H01L21/02 ,  H01L21/322 ,  H01L21/762 ,  H01L23/66

CPC classification number: H01L21/02381 ,  H01L21/02532 ,  H01L21/3225 ,  H01L21/76254 ,  H01L23/66

Abstract: A support substrate for a radiofrequency application comprises: —a base substrate made of monocrystalline silicon comprising P-type dopants and having a resistivity that is greater than or equal to 250 ohm·cm and strictly less than 500 ohm·cm, and a content of interstitial oxygen between 13 ppma and 19 ppma, —an epitaxial layer made of monocrystalline silicon comprising P-type dopants, disposed on the base substrate and having a thickness between 2 microns and 30 microns, an upper portion at least of the epitaxial layer having a resistivity greater than 3000 ohm·cm, —a charge-trapping layer made of polycrystalline silicon having a resistivity greater than or equal to 1000 ohm·cm and a thickness between 1 micron and 10 microns. A method is used for manufacturing such a support substrate.