THERMAL PROCESSING METHOD FOR WAFER

    公开(公告)号:US20170256420A1

    公开(公告)日:2017-09-07

    申请号:US15268006

    申请日:2016-09-16

    IPC分类号: H01L21/322 H01L21/02

    摘要: The present invention relates to a thermal processing method for wafer. A wafer is placed in an environment filled with a non-oxygenated gas mixture comprising deuterium gas and at least one kind of low active gas, and a rapid heating processing process is performed on a surface of the wafer to heat the wafer to a predetermined high temperature. Then, the wafer is placed in an environment filled with an oxygenated gas mixture, and a rapid cooling processing process is performed on a surface of the wafer. As a result, a denuded zone is formed on the surface of the wafer, deuterium atoms, which may be released to improve characteristics at an interface of semiconductor devices in a later fabrication process, are held in the wafer, and bulk micro-defects are formed far from the semiconductor devices.

    METHOD FOR HEAT-TREATING SILICON SINGLE CRYSTAL WAFER

    公开(公告)号:US20170253995A1

    公开(公告)日:2017-09-07

    申请号:US15519859

    申请日:2015-09-17

    摘要: A method for heat-treating a silicon single crystal wafer by an RTA treatment, including: putting a silicon single crystal wafer having an Nv region for the entire plane of the silicon single crystal wafer or an Nv region containing an OSF region for the silicon single crystal wafer entire plane into an RTA furnace, performing pre-heating at temperature lower than temperature at which silicon reacts with NH3 while supplying gas that contains NH3 into the RTA furnace, subsequently stopping the supply of the gas containing NH3 and starting supply of Ar gas to start an RTA treatment under Ar gas atmosphere in which the NH3 gas remains. This provide a method for heat-treating a silicon single crystal wafer that give gettering capability without degrading TDDB properties even to a silicon single crystal wafer in which the entire plane is an Nv region or an Nv region containing an OSF region.

    Method of producing epitaxial silicon wafer, epitaxial silicon wafer, and method of producing solid-state image sensing device
    6.
    发明授权
    Method of producing epitaxial silicon wafer, epitaxial silicon wafer, and method of producing solid-state image sensing device 有权
    制造外延硅晶片,外延硅晶片的方法和制造固态图像感测装置的方法

    公开(公告)号:US09576800B2

    公开(公告)日:2017-02-21

    申请号:US15182443

    申请日:2016-06-14

    申请人: SUMCO Corporation

    发明人: Takeshi Kadono

    摘要: Provided is an epitaxial silicon wafer free of epitaxial defects caused by dislocation clusters and COPs with reduced metal contamination achieved by higher gettering capability and a method of producing the epitaxial wafer. A method of producing an epitaxial silicon wafer includes a first step of irradiating a silicon wafer free of dislocation clusters and COPs with cluster ions to form a modifying layer formed from a constituent element of the cluster ions in a surface portion of the silicon wafer; and a second step of forming an epitaxial layer on the modifying layer of the silicon wafer.

    摘要翻译: 提供了一种外延硅晶片,其由位错簇引起的外延缺陷和通过较高的吸杂能力实现的具有减少的金属污染的COP和一种制造外延晶片的方法。 一种外延硅晶片的制造方法,其特征在于,包括:第一工序,在硅晶片的表面部照射不含位错簇的硅晶片和具有簇离子的COP,形成由所述簇离子的构成元素形成的改性层; 以及在硅晶片的改性层上形成外延层的第二步骤。

    Use of an external getter to reduce package pressure
    7.
    发明授权
    Use of an external getter to reduce package pressure 有权
    使用外部吸气剂降低包装压力

    公开(公告)号:US09570321B1

    公开(公告)日:2017-02-14

    申请号:US14887544

    申请日:2015-10-20

    申请人: RAYTHEON COMPANY

    摘要: A system and method for forming a wafer level package. In one example, a substrate used in the wafer level package includes a surface defined by a wafer level package (WLP) region and an external region, and a layer of getter material is disposed on at least a portion of the external region. According to one embodiment, the external region comprises a saw-to-reveal (STR) region of the wafer.

    摘要翻译: 一种用于形成晶片级封装的系统和方法。 在一个示例中,用于晶片级封装的衬底包括由晶片级封装(WLP)区域和外部区域限定的表面,并且吸收材料层设置在外部区域的至少一部分上。 根据一个实施例,外部区域包括晶片的锯切(STR)区域。

    QUALITY EVALUATION METHOD FOR SILICON WAFER, AND SILICON WAFER AND METHOD OF PRODUCING SILICON WAFER USING THE METHOD
    9.
    发明申请
    QUALITY EVALUATION METHOD FOR SILICON WAFER, AND SILICON WAFER AND METHOD OF PRODUCING SILICON WAFER USING THE METHOD 有权
    用于硅波的质量评估方法和硅波以及使用该方法生产硅波的方法

    公开(公告)号:US20160247694A1

    公开(公告)日:2016-08-25

    申请号:US15052235

    申请日:2016-02-24

    申请人: SUMCO CORPORATION

    摘要: After determining the size of oxygen precipitates and the residual oxygen concentration in a silicon wafer after heat treatment performed in a device fabrication process; the critical shear stress τcri at which slip dislocations are formed in the silicon wafer in the device fabrication process is determined based on the obtained size of the oxygen precipitates and residual oxygen concentration; and the obtained critical shear stress τcri and the thermal stress τ applied to the silicon wafer in the heat treatment of the device fabrication process are compared, thereby determining that slip dislocations are formed in the silicon wafer in the device fabrication process when the thermal stress τ is equal to or more than the critical shear stress τcri, or determining that slip dislocations are not formed in the silicon wafer in the device fabrication process when the thermal stress τ is less than the critical shear stress τcri.

    摘要翻译: 在器件制造过程中进行热处理后,确定氧析出物的尺寸和硅晶片中的残留氧浓度; 基于获得的氧沉淀物的尺寸和残余氧浓度来确定在器件制造工艺中在硅晶片中形成滑移位错的临界剪切应力τcri; 并且比较了在器件制造工艺的热处理中所获得的临界剪切应力τcri和施加到硅晶片的热应力τ,从而确定在器件制造工艺中在硅晶片中形成滑动位错时,当热应力τ 等于或大于临界剪切应力τcri,或者当热应力τ小于临界剪切应力τcri时,确定在器件制造过程中在硅晶片中不形成滑移位错。