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公开(公告)号：US12027116B2
公开(公告)日：2024-07-02
申请号：US18071762
申请日：2022-11-30
申请人： Sony Corporation
IPC分类号： G09G3/3225 , G09G3/3233 , H10K50/824 , H10K59/121 , H10K59/131 , G09G3/3258 , H10K59/10 , H10K59/35
CPC分类号： G09G3/3225 , G09G3/3233 , H10K50/824 , H10K59/121 , H10K59/1315 , G09G3/3258 , G09G2300/0426 , H10K59/10 , H10K59/35 , H10K59/353
摘要： A display device including: a plurality of sub-pixels arranged in a matrix, each including an electro-optical element having a structure in which a display functional layer is sandwiched between an upper electrode and a lower electrode; and an auxiliary interconnect contact in a pixel area in which the plurality of sub-pixels are arranged in a matrix and electrically connecting the upper electrode to an auxiliary interconnect, wherein m (m is an integer equal to or larger than two) sub-pixels adjacent to each other along an arrangement direction of the sub-pixels are regarded as one group, and n (n is a natural number smaller than m) auxiliary interconnect contacts are formed for each group.
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公开(公告)号：US20230091149A1
公开(公告)日：2023-03-23
申请号：US18071762
申请日：2022-11-30
申请人： Sony Corporation
IPC分类号： G09G3/3225 , G09G3/3233 , H01L27/32 , H01L51/52
摘要： A display device including: a plurality of sub-pixels arranged in a matrix, each including an electro-optical element having a structure in which a display functional layer is sandwiched between an upper electrode and a lower electrode; and an auxiliary interconnect contact in a pixel area in which the plurality of sub-pixels are arranged in a matrix and electrically connecting the upper electrode to an auxiliary interconnect, wherein m (m is an integer equal to or larger than two) sub-pixels adjacent to each other along an arrangement direction of the sub-pixels are regarded as one group, and n (n is a natural number smaller than m) auxiliary interconnect contacts are formed for each group.
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公开(公告)号：US11545087B2
公开(公告)日：2023-01-03
申请号：US17342217
申请日：2021-06-08
申请人： Sony Corporation
IPC分类号： G09G3/3225 , G09G3/3233 , H01L27/32 , H01L51/52 , G09G3/3258
摘要： A display device including: a plurality of sub-pixels arranged in a matrix, each including an electro-optical element having a structure in which a display functional layer is sandwiched between an upper electrode and a lower electrode; and an auxiliary interconnect contact in a pixel area in which the plurality of sub-pixels are arranged in a matrix and electrically connecting the upper electrode to an auxiliary interconnect, wherein m (m is an integer equal to or larger than two) sub-pixels adjacent to each other along an arrangement direction of the sub-pixels are regarded as one group, and n (n is a natural number smaller than m) auxiliary interconnect contacts are formed for each group.
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公开(公告)号：USRE48891E1
公开(公告)日：2022-01-11
申请号：US16797464
申请日：2020-02-21
申请人： Sony Corporation
IPC分类号： G09G3/30 , G09G3/32 , G09G3/3233 , G09G3/3266 , G09G3/3291
摘要： A display apparatus includes a pixel unit in which pixels are arranged in a matrix pattern; and a driving circuit for driving the pixel unit. Each of the pixels includes a signal level holding capacitor; a first transistor that is turned on/off in response to a writing signal and via which one end of the signal level holding capacitor is connected to a signal line; a second transistor having one end of the signal level holding capacitor connected to a gate thereof and the other end of the signal level holding capacitor connected to a source thereof; a current-driven self-light-emitting element whose cathode is held at a cathode potential and whose anode is connected to the source of the second transistor; a third transistor that is turned on/off in response to a driving pulse signal; and a fourth transistor that is turned on/off in response to a control signal.
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公开(公告)号：US20210295772A1
公开(公告)日：2021-09-23
申请号：US17342217
申请日：2021-06-08
申请人： Sony Corporation
IPC分类号： G09G3/3225 , G09G3/3233 , H01L27/32 , H01L51/52
摘要： A display device including: a plurality of sub-pixels arranged in a matrix, each including an electro-optical element having a structure in which a display functional layer is sandwiched between an upper electrode and a lower electrode; and an auxiliary interconnect contact in a pixel area in which the plurality of sub-pixels are arranged in a matrix and electrically connecting the upper electrode to an auxiliary interconnect, wherein m (m is an integer equal to or larger than two) sub-pixels adjacent to each other along an arrangement direction of the sub-pixels are regarded as one group, and n (n is a natural number smaller than m) auxiliary interconnect contacts are formed for each group.
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公开(公告)号：US20190392756A1
公开(公告)日：2019-12-26
申请号：US16564756
申请日：2019-09-09
申请人： Sony Corporation
IPC分类号： G09G3/3225 , G09G3/3233 , H01L27/32 , G09G3/3258
摘要： An electroluminescent display panel has pixel circuits for an active matrix driving system. At least one of the pixel circuits has a thin-film transistor in which a portion of a pattern of a metal wiring material above a channel layer of the thin-film transistor is disposed to shield the channel region of the thin-film transistor.
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公开(公告)号：US20190197955A1
公开(公告)日：2019-06-27
申请号：US16292852
申请日：2019-03-05
申请人： Sony Corporation
IPC分类号： G09G3/3233
CPC分类号： G09G3/3233 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861 , G09G2320/0238 , G09G2320/045
摘要： A display device includes a pixel array unit formed by disposing pixel circuits having a P-channel type drive transistor that drives a light-emitting unit, a sampling transistor that applies a signal voltage, a light emission control transistor that controls emission/non-emission of the light-emitting unit, a storage capacitor that is connected between a gate electrode and a source electrode of the drive transistor and an auxiliary capacitor that is connected to the source electrode, and a drive unit that, during threshold correction, respectively applies a first voltage and a second voltage to the source electrode of the drive transistor and the gate electrode thereof, the difference between the first voltage and the second voltage being less than a threshold voltage of the drive transistor, and subsequently performs driving that applies a standard voltage used in threshold correction to the gate electrode when the source electrode is in a floating state.
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公开(公告)号：US20190180697A1
公开(公告)日：2019-06-13
申请号：US16279515
申请日：2019-02-19
申请人： Sony Corporation
IPC分类号： G09G3/3291 , G09G3/3233
摘要： A pixel circuit performs a threshold voltage correcting function. A sampling transistor becomes conductive in response to a control signal supplied from a scan line and samples a video signal supplied from a signal line to a pixel capacitor during a horizontal scanning period. The pixel capacitor applies an input voltage to a gate of a drive transistor in response to the sampled video signal. The drive transistor supplies an output current in accordance with the input voltage to a light-emitting device. A threshold voltage correcting period is provided to be part of the horizontal scanning period, to detect the threshold voltage of the drive transistor, and to write the threshold voltage in the pixel capacitor.
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公开(公告)号：US10276102B2
公开(公告)日：2019-04-30
申请号：US15869738
申请日：2018-01-12
申请人： Sony Corporation
IPC分类号： G09G3/30 , G09G3/3258 , G09G3/20 , G09G3/3233 , G09G3/3266 , G09G3/3291
摘要： A pixel circuit having a function of compensating for characteristic variation of an electro-optical element and threshold voltage variation of a transistor is formed from a reduced number of component elements. An input signal is sampled from a signal line so as to be held in a holding capacitor. The threshold voltage of the drive transistor is imparted to the holding capacitor in order to cancel an influence of the threshold voltage.
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公开(公告)号：US10008150B2
公开(公告)日：2018-06-26
申请号：US15478935
申请日：2017-04-04
申请人： Sony Corporation
发明人： Tetsuo Minami , Junichi Yamashita
IPC分类号： H01L27/32 , G09G3/3233 , G09G3/00 , H05B33/08
CPC分类号： G09G3/3233 , G09G3/00 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2300/0866 , G09G2310/0256 , G09G2320/0233 , H01L27/326 , H01L27/3276 , H05B33/0896 , Y02B20/343
摘要： A light-emitting device comprising an emitting unit including at least two emitting elements, a driving unit configured to control the emitting unit, and a capacitor unit formed over the driving unit. A shield layer may be located between the two emitting elements. In one example, the capacitor unit is formed at a level higher than a level of the driving unit, and a shield layer that is located between the two emitting elements is formed at a level that is higher than the level of the driving unit and equal to or lower than the level of the capacitor unit.
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