Digitally controlled low dropout regulator

    公开(公告)号:US11899479B2

    公开(公告)日:2024-02-13

    申请号:US17616228

    申请日:2020-03-16

    IPC分类号: G05F1/575 G05F1/56 H02M1/00

    摘要: To provide a digitally controlled LDO regulator that can control an output voltage even during an auto-zero processing period. A digitally controlled low dropout regulator is provided that includes a plurality of AD converters and an impedance variable circuit, each of the plurality of AD converters including a comparator, in which a first signal from each of the plurality of AD converters is input to the impedance variable circuit; a second signal output from the impedance variable circuit is input to one of two terminals of each of the plurality of AD converters; when one of the plurality of AD converters is in operation, another of the plurality of AD converters performs auto-zero processing to set a voltage value used as a reference; and the comparator compares a voltage value of the second signal input to the one of the two terminals with the set voltage value.

    Starting circuit
    2.
    发明授权

    公开(公告)号:US11271548B2

    公开(公告)日:2022-03-08

    申请号:US17056362

    申请日:2019-02-22

    发明人: Hiroyuki Watanabe

    摘要: A starting circuit capable of further reducing an influence of a variation in the threshold voltage of a transistor is proposed. The starting circuit includes an N-type first MOS transistor whose threshold voltage is near 0 V, a resistor interposed between a source terminal of the first MOS transistor and a ground, and a control circuit controlling a gate voltage of the first MOS transistor. An amount of first current transmitted to a device to be driven and starting the device is controlled according to the control of the gate voltage.

    REFERENCE VOLTAGE CIRCUIT AND ELECTRONIC APPARATUS

    公开(公告)号:US20210294366A1

    公开(公告)日:2021-09-23

    申请号:US17262096

    申请日:2019-08-09

    发明人: Hiroyuki Watanabe

    IPC分类号: G05F1/46 G05F1/567 G05F3/26

    摘要: A reference voltage circuit (1) includes a PTAT voltage generation circuit (20) that generates a voltage with a positive temperature coefficient, a CTAT voltage generation circuit (10) that generates a voltage with a negative temperature coefficient, and a temperature characteristic adjustment circuit (30) that generates a voltage for adjusting temperature characteristics. The reference voltage circuit outputs a reference voltage (VOUT) formed by calculation based on the output of the PTAT voltage generation circuit, output of the CTAT voltage generation circuit, and output of the temperature characteristic adjustment circuit.

    Activation circuit for activating a drive target

    公开(公告)号:US11513549B2

    公开(公告)日:2022-11-29

    申请号:US17046937

    申请日:2019-01-30

    发明人: Hiroyuki Watanabe

    IPC分类号: G05F3/26 H03F3/347

    摘要: An activation circuit which can realize both of area reduction and current consumption reduction by more preferred embodiments. The activation circuit has an N-type MOS transistor having a gate terminal connected to a ground and having a threshold voltage in a vicinity of 0 V and a resistor interposed between a source terminal of the MOS transistor and a ground, wherein an electric potential of a drain terminal of the MOS transistor is controlled depending on a first signal output from a device serving as a drive target, and transmission of a second signal for activating the device is controlled depending on the electric potential of the drain terminal.