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公开(公告)号:US08665000B2
公开(公告)日:2014-03-04
申请号:US13576827
申请日:2011-02-14
IPC分类号: G06G7/12
CPC分类号: H03D7/165 , H03D7/18 , H03D2200/0086
摘要: A method of frequency down-converting an input signal to an output signal, a first local oscillator signal is generated as a square wave having a duty cycle of 1/3 or 2/3, and the input signal is mixed with first oscillator signal to achieve a first down-converted signal, a second local oscillator signal is generated as a modified square wave having the same period time as the first oscillator signal and a duty cycle of 2/3, of which one part has a positive amplitude and another part has a negative amplitude. The input signal is mixed with the second oscillator signal to achieve a second down-converted signal. The first oscillator signal has a delay of 1/4 of the period time to achieve a phase shift of π/2 between the oscillator signals, and at least one down-converted signal is multiplied by a pre-calculated factor. The resulting down-converted signals are added to achieve the output signal.
摘要翻译: 将输入信号下变频为输出信号的方法,产生第一本地振荡器信号作为占空比为1/3或2/3的方波,并将输入信号与第一振荡器信号混合 实现第一下变频信号,产生第二本地振荡器信号作为具有与第一振荡器信号相同周期时间的修正方波,并且产生其中一部分具有正振幅的占空比2/3,另一部分 具有负幅度。 输入信号与第二振荡器信号混合以实现第二下变频信号。 第一振荡器信号具有周期时间的1/4的延迟以实现振荡器信号之间的π/ 2的相移,并且至少一个下变频信号乘以预先计算的因子。 所产生的下变频信号被加入以实现输出信号。
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公开(公告)号:US20120313672A1
公开(公告)日:2012-12-13
申请号:US13576827
申请日:2011-02-14
IPC分类号: H03B19/00
CPC分类号: H03D7/165 , H03D7/18 , H03D2200/0086
摘要: In a method of frequency down-converting an input signal to an output signal, a first local oscillator signal is generated as a square wave having a duty cycle of 1/3 or 2/3, and the input signal is mixed with the first oscillator signal to achieve a first down-converted signal, A second local oscillator signal is generated as a modified square wave having the same period time and a duty cycle of 2/3, of which one part has a positive amplitude and another part has a negative amplitude. The input signal is mixed with the second oscillator signal to achieve a second down-converted signal. The first oscillator signal has a delay of 1/4 of the period time to achieve a phase shift of π/2 between the oscillator signals, and at least one down-converted signal is multiplied by a pre-calculated factor. The resulting down-converted signals are added to achieve the output signal.
摘要翻译: 在将输入信号下变频为输出信号的方法中,产生第一本地振荡器信号作为占空比为1/3或2/3的方波,并且输入信号与第一振荡器 信号以实现第一下变频信号,第二本地振荡器信号被生成为具有相同周期时间和2/3的占空比的修改的方波,其中一个部分具有正幅度,另一部分具有负的 振幅。 输入信号与第二振荡器信号混合以实现第二下变频信号。 第一振荡器信号具有周期时间的1/4的延迟,以实现振荡器信号之间的&pgr / 2的相移,并且至少一个下变频信号乘以预先计算的因子。 所产生的下变频信号被加入以实现输出信号。
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公开(公告)号:US09094104B2
公开(公告)日:2015-07-28
申请号:US13586500
申请日:2012-08-15
申请人: Imad Ud Din , Stefan Andersson , Daniel Eckerbert , Henrik Sjöland , Tobias Tired , Johan Wernehag
发明人: Imad Ud Din , Stefan Andersson , Daniel Eckerbert , Henrik Sjöland , Tobias Tired , Johan Wernehag
CPC分类号: H04B1/525 , H04B2203/5491 , Y10T29/49117
摘要: A transceiver front-end of a communication device comprises a frequency blocking arrangement, which may be either a transmit frequency blocking arrangement or a receive frequency blocking arrangement. The frequency blocking arrangement has a blocking frequency interval associated with one of a transmit frequency and receive frequency, and a non-blocking frequency interval associated with the other of the transmit frequency and receive frequency. The frequency blocking arrangement is configured to block passage of signals in the blocking frequency interval between said signal transmission and reception node and either said receiver node or said transmitter node. The frequency blocking arrangement comprises a network of passive components comprising at least one transformer and a filter arrangement adapted to have a higher impedance value in the blocking frequency interval than in the non-blocking frequency interval.
摘要翻译: 通信设备的收发机前端包括频率阻塞装置,其可以是发射频率阻塞装置或接收频率阻塞装置。 频率阻挡装置具有与发射频率和接收频率之一相关联的阻塞频率间隔以及与发射频率和接收频率中的另一个相关联的非阻塞频率间隔。 频率阻塞装置被配置为阻止所述信号发射和接收节点与所述接收机节点或所述发射机节点之间的阻塞频率间隔中的信号的通过。 频率阻挡装置包括无源部件网络,其包括至少一个变压器和滤波器装置,其适于在阻塞频率间隔中具有比在非阻塞频率间隔中更高的阻抗值。
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